Gunma, Japan

Masamichi Yanagida

This inventor holds 2 USPTO granted patents. Top assignee: Upi Semiconductor Corporation. Active years: 2019.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Masamichi Yanagida. Retrieved from https://idiyas.com/inventor/masamichi-yanagida

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 2.7

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2019

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2 patents (USPTO):Explore Patents

Title: Masamichi Yanagida and His Semiconductor Inventions.

Introduction

Masamichi Yanagida is an inventor associated with Gunma, Japan, and Upi Semiconductor Corporation. His work focuses on semiconductor devices, packaging, and manufacturing methods. He is credited with 2 patents.

Latest Patents

Yanagida’s listed patents address semiconductor device design and wafer processing.

“Semiconductor device and portable apparatus using the same” describes a package design that positions gate electrodes near the package’s longitudinal sides and extends gate terminals outward from both sides. This arrangement is intended to make the package smaller or thinner while preserving MOSFET characteristics and reducing on-resistance. It also allows the semiconductor chip to occupy more of the package, supporting improved module performance.

“Semiconductor device, semiconductor wafer and semiconductor device manufacturing method” describes a process involving preparation, partial thickness removal, and cutting of a semiconductor wafer. During removal, a raised, rib-shaped portion on the wafer’s second main surface serves as an alignment mark to help position the cutter.

Career Highlights

Yanagida’s patent work reflects an emphasis on practical semiconductor engineering. The inventions address both device-level performance and manufacturing precision, including compact packaging, electrical characteristics, and wafer alignment.

Collaborations

Nobuyoshi Matsuura and Hiroki Arai are identified as Yanagida’s coworkers. The available information does not specify their roles in the listed inventions.

Conclusion

Masamichi Yanagida’s listed inventions combine compact semiconductor packaging with wafer-processing techniques, highlighting his contributions to device design and manufacturing.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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