This inventor holds 3 USPTO granted patents. Top assignee: Nec Corporation. Active years: 1999-2002.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 1999-2002
Title: Masamichi Kawarabayashi: Innovator in Logic Circuit Design
Introduction
Masamichi Kawarabayashi is a prominent inventor based in Tokyo, Japan. He has made significant contributions to the field of logic circuit design, holding a total of 3 patents. His work focuses on optimizing circuit performance and enhancing the efficiency of electronic devices.
Latest Patents
Kawarabayashi's latest patents include a method for changing a logic circuit portion into a gated clock portion. This innovative method designs a logic circuit that incorporates a flip-flop, which performs on and off operations in response to a timing clock and a feedback loop. The structure allows for the automatic extraction of a logic circuit portion that operates based on an enable signal. By utilizing a gated clock obtained through the enable signal, the number of on and off operations of the flip-flop can be significantly reduced.
Another notable patent is a delay optimization system designed to ensure that circuit specifications meet delay constraints. This system includes a layout processing unit that receives circuit specifications and extracts wiring information. It also features an optimization processing unit that generates circuit change information and determines whether the layout satisfies the set delay constraints. The layout processing unit executes initial layouts based solely on synthesized circuit information and re-layouts based on the generated optimization data.
Career Highlights
Masamichi Kawarabayashi is currently employed at NEC Corporation, where he continues to innovate in the field of electronics. His work has had a profound impact on the development of efficient logic circuits and optimization systems.
Collaborations
Kawarabayashi has collaborated with notable colleagues, including Takuo Nakaki and Koichi Sato. Their combined expertise has contributed to advancements in circuit design and optimization.
Conclusion
Masamichi Kawarabayashi is a distinguished inventor whose work in logic circuit design and optimization has led to significant advancements in the field. His innovative patents reflect his commitment to enhancing electronic performance and efficiency.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
