Martin J Alter

This inventor holds 31 USPTO granted patents and 1 published patent application, primarily in Semiconductor Devices. Top assignees: Micrel, Incorporated, Micrel Semiconductor. Active years: 1990-2014.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Martin J Alter. Retrieved from https://idiyas.com/inventor/martin-j-alter

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 31 (Patent Applications = 1)

% Patents Active = 80.6

Average Co-Inventor Count = 1.6

ph-index = 11

Forward Citations = 617(Granted Patents)

Company Filing History:

Years Active: 1990-2014

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Areas of Expertise:

LDMOS Transistor

Schottky Diode

Chip Scale Packaging

High Breakdown Voltage

Power FET

Ballast Resistors

Integrated Circuit

Polysilicon Layers

DMOS Device

Capacitor Formation

Programmable Optical Array

Substrate Implant Process

31 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 8889518 - LDMOS transistor with asymmetric spacer as gate (2014-11-18),

2. 8525257 - LDMOS transistor with asymmetric spacer as gate (2013-09-03),

3. 8227860 - System for vertical DMOS with slots (2012-07-24),

4. 7960754 - Diode having high breakdown voltage and low on-resistance (2011-06-14),

5. 7843019 - Seal ring for mixed circuitry semiconductor devices (2010-11-30),

6. 7586132 - Power FET with low on-resistance using merged metal layers (2009-09-08),

7. 7573098 - Transistors fabricated using a reduced cost CMOS process (2009-08-11),

8. 7501693 - LDO regulator with ground connection through package bottom (2009-03-10),

9. 7485549 - Seal ring for mixed circuitry semiconductor devices (2009-02-03),

10. 7315052 - Power FET with embedded body pickup (2008-01-01),

11. 7211893 - Integrating chip scale packaging metallization into integrated circuit die structures (2007-05-01),

12. 7195952 - Schottky diode device with aluminum pickup of backside cathode (2007-03-27),

13. 7145211 - Seal ring for mixed circuitry semiconductor devices (2006-12-05),

14. 7087973 - Ballast resistors for transistor devices (2006-08-08),

15. 6917105 - Integrating chip scale packaging metallization into integrated circuit die structures (2005-07-12),

Title: Martin J Alter - Innovative Inventor from Los Altos

Introduction: Martin J Alter is a renowned inventor based in Los Altos, CA, known for his groundbreaking contributions to various fields.

Latest Patents: Martin J Alter holds several patents in the areas of technology, healthcare, and consumer products, showcasing his diverse range of expertise.

Career Highlights: With a career spanning over two decades, Martin J Alter has consistently pushed the boundaries of innovation, leading to the development of cutting-edge solutions that have impacted industries worldwide.

Collaborations: Throughout his career, Martin J Alter has collaborated with leading companies, research institutions, and universities to bring his inventions to life, fostering a culture of creativity and excellence.

Conclusion: Martin J Alter's passion for innovation and his relentless pursuit of excellence continue to inspire the next generation of inventors and shape the future of technology.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

1 patent pending: