The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 08, 2006

Filed:

Apr. 01, 2003
Applicants:

Shekar Mallikarjunaswamy, San Jose, CA (US);

Martin J. Alter, Los Altos, CA (US);

Charles L. Vinn, Milpitas, CA (US);

Inventors:

Shekar Mallikarjunaswamy, San Jose, CA (US);

Martin J. Alter, Los Altos, CA (US);

Charles L. Vinn, Milpitas, CA (US);

Assignee:

Micrel, Incorporated, San Jose, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/58 (2006.01); H01L 29/94 (2006.01);
U.S. Cl.
CPC ...
Abstract

A transistor is formed with a source ballast resistor that regulates channel current. In an LDMOS transistor embodiment, the source ballast resistance may be formed using a high sheet resistance diffusion self aligned to the polysilicon gate, and/or by extending a depletion implant from under the polysilicon gate toward the source region. The teachings herein may be used to form effective ballast resistors for source and/or drain regions, and may be used in many types of transistors, including lateral and vertical transistors operating in a depletion or an enhancement mode, and BJT devices.


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