The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7843019 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 30, 2010

Filed:

Aug. 31, 2006
Applicants:

Shekar Mallikarjunaswamy, San Jose, CA (US);

Martin Alter, Los Altos, CA (US);

Inventors:

Shekar Mallikarjunaswamy, San Jose, CA (US);

Martin Alter, Los Altos, CA (US);

Assignee:

Micrel, Incorporated, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
Abstract

In mixed-component, mixed-signal, semiconductor devices, selective seal ring isolation from the substrate and its electrical potential is provided in order to segregate noise sensitive circuitry from electrical noise generated by electrically noisy circuitry. Appropriate predetermined sections of such a mixed use chip are isolated from the substrate through a non-ohmic contact with the substrate without compromising reliability of the chip's isolation from scribe region contamination.


Find Patent Forward Citations

Mallikarjunaswamy, Shekar. (2010). Seal ring for mixed circuitry semiconductor devices (U.S. Patent No. 7843019). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7843019

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…