Boise, ID, United States of America

Mark A Zaleski

This inventor holds 3 USPTO granted patents and 1 published patent application. Top assignee: Micron Technology Incorporated. Active years: 2020-2024.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Mark A Zaleski. Retrieved from https://idiyas.com/inventor/mark-a-zaleski-cwpmodsf

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 3 

% Patents Active = 100.0

Average Co-Inventor Count = 5.5

ph-index = 1

Forward Citations = 4(Granted Patents)


Company Filing History:


Years Active: 2020-2024

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3 patents (USPTO):Explore Patents

Title: Innovations by Mark A. Zaleski in Semiconductor Technology

Introduction

Mark A. Zaleski is a notable inventor based in Boise, Idaho, recognized for his contributions to semiconductor technology. He holds three patents that showcase his innovative approach to enhancing memory devices and conductive structures.

Latest Patents

Zaleski's latest patents include groundbreaking systems, methods, and apparatuses that focus on conductive line contact regions. One of his significant inventions involves conductive line contact regions having multiple multi-direction conductive lines and staircase conductive line contact structures for semiconductor devices. This invention describes a memory device that comprises arrays of vertically stacked memory cells, featuring multiple multi-direction conductive lines. The design includes a vertical stack of layers formed from repeating iterations of a group of layers, which consist of a first dielectric material layer, a semiconductor material layer, and a second dielectric material layer. The second dielectric material layer contains a conductive line formed in a horizontal plane, with the vertical stack having multiple multi-direction conductive lines in an interconnection region.

Another patent focuses on multi-direction conductive lines and staircase contacts for semiconductor devices. This memory device includes an array of vertically stacked memory cells, with a vertical stack of horizontally oriented conductive lines. Each conductive line comprises a first portion extending in a first horizontal direction and a second portion extending in a second horizontal direction at an angle to the first.

Career Highlights

Mark A. Zaleski is currently employed at Micron Technology Incorporated, where he continues to innovate in the field of semiconductor technology. His work has significantly impacted the design and functionality of memory devices.

Collaborations

Zaleski has collaborated with notable colleagues, including Byung Yoon Kim and Si-Woo Lee, contributing to advancements in semiconductor technology.

Conclusion

Mark A. Zaleski's innovative patents and contributions to semiconductor technology highlight his expertise and commitment to advancing the field. His work at Micron Technology Incorporated continues to influence the development of memory devices and conductive structures.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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