Mahilchi Milir Vaseekar Kumar

Title: Mahilchi Milir Vaseekar Kumar: Innovator in Machine Learning and Integrated Circuit Design

Introduction

Mahilchi Milir Vaseekar Kumar is a prominent inventor based in San Jose, CA. He has made significant contributions to the field of machine learning and integrated circuit design. With a total of 2 patents, Kumar is recognized for his innovative approaches to improving automatic test pattern generation.

Latest Patents

Kumar's latest patents focus on a machine-learning-based design-for-test (DFT) recommendation system aimed at enhancing the quality of results (QoR) in automatic test pattern generation (ATPG). The first patent describes a method where a trained machine learning (ML) model predicts a set of ranked test-case configurations for an integrated circuit (IC) design based on extracted features. This includes configurations related to scan chain input and output ports, as well as scan chain length values. The second patent outlines a process for collecting training data from various test-case configurations across multiple IC designs. This data is used to train an ML model that predicts ranked test-case configurations based on features from a given IC design.

Career Highlights

Kumar is currently employed at Synopsys, Inc., where he applies his expertise in machine learning and integrated circuit design. His work has been instrumental in advancing the capabilities of automatic test pattern generation, making significant strides in the industry.

Collaborations

Kumar has collaborated with notable colleagues such as Apik A Zorian and Fadi Maamari. Their combined efforts contribute to the innovative projects at Synopsys, Inc., enhancing the overall impact of their work in the field.

Conclusion

Mahilchi Milir Vaseekar Kumar is a key figure in the realm of machine learning and integrated circuit design. His patents and contributions reflect a commitment to innovation and excellence in technology.