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For the Inventor, By the Inventor

Chandler, AZ, United States of America

Luis Briones

This inventor holds 12 USPTO granted patents and 1 published patent application. Top assignees: Standard Microsystems Corporation, Freescale Semiconductor,inc., Motorola Corporation. Active years: 2002-2022.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Luis Briones. Retrieved from https://idiyas.com/inventor/luis-briones

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 12 

% Patents Active = 83.3

Average Co-Inventor Count = 2.1

ph-index = 5

Forward Citations = 69(Granted Patents)


Company Filing History:

goldMedal6 out of 274 
 
Standard Microsystems Corporation
 patents
silverMedal3 out of 5,491 
 
Freescale Semiconductor,inc.
 patents
bronzeMedal1 out of 20,290 
 
Motorola Corporation
 patents
4. 1 out of 45,060 
 
Qualcomm Incorporated
 patents
5. 1 out of 99 
 
Qualcomm Technologies International, Ltd.
 patents

Years Active: 2002-2022

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12 patents (USPTO):Explore Patents
1. 11271662 - Low power communication links between wireless devices (2022-03-08),
2. 9362966 - Bidirectional ports for multi-tuner background radios (2016-06-07),
3. 8847804 - Delay compensated continuous time sigma delta analog-to-digital converter (2014-09-30),
4. 8482266 - Voltage regulation circuitry and related operating methods (2013-07-09),
5. 7990937 - Initiation of high speed overlay mode for burst data and real time streaming (audio) applications (2011-08-02),
6. 7433442 - Linear half-rate clock and data recovery (CDR) circuit (2008-10-07),
7. 7415260 - Current-mode direct conversion receiver (2008-08-19),
8. 7055047 - Selective implementation of power management schemes based on detected computer operating environment (2006-05-30),
9. 7043222 - FSK modulator using IQ up-mixers and sinewave coded DACs (2006-05-09),
10. 6900675 - All digital PLL trimming circuit (2005-05-31),
11. 6806742 - Phase detector for low power applications (2004-10-19),
12. 6496556 - Step-down clock control and method for improving convergence for a digitally controlled self-calibrating VCO (2002-12-17),

Title: **Luis Briones: Innovating Communication Technology**

Introduction

Luis Briones is a notable inventor residing in Chandler, AZ, USA, who holds an impressive portfolio of 12 patents. His contributions to the field of wireless communication have garnered attention, particularly in methods that enhance connectivity and efficiency.

Latest Patents

Among his latest innovations is a patent for **Low Power Communication Links Between Wireless Devices**. This method enables wireless devices to establish communication links through the human body, facilitating an efficient communication mechanism. Additionally, he has developed **Bidirectional Ports for Multi-Tuner Background Radios**, which includes tuners and methods for configuring multiple tuners on integrated circuits. This invention features an RF amplifier and a bidirectional port circuit that enables flexible signal routing.

Career Highlights

Luis has had a distinguished career, working with renowned companies such as Standard Microsystems Corporation and Freescale Semiconductor, Inc. His experience in these technology-driven environments has enabled him to refine his skills and develop innovative solutions that meet contemporary demands.

Collaborations

Throughout his career, Luis has collaborated with talented professionals including Klaas Wortel and Troy L. Stockstad. These partnerships have allowed him to leverage diverse expertise and insights, further enhancing his contributions to the field.

Conclusion

Luis Briones is a visionary inventor whose work in communication technology is paving the way for future innovations. His patents illustrate a commitment to developing efficient and groundbreaking solutions, solidifying his standing in the realm of inventors.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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