Luis Briceno Guerrero

Title: Luis Briceno Guerrero: Innovator in AC I/O Loopback Testing

Introduction

Luis Briceno Guerrero is a notable inventor based in San Jose, Costa Rica. He has made significant contributions to the field of logic simulation and validation of AC I/O loopback tests. His innovative approach has paved the way for advancements in pre-silicon environments.

Latest Patents

Luis holds a patent titled "Methods and apparatuses for validating AC I/O loopback tests using delay modeling in RTL simulation." This invention provides a logic simulation with a controllable delay model that can validate AC I/O loopback designs. By introducing delay models, the logic simulators can simulate analog behavior effectively. A fixed processor ratio is selected, and delay statements in the hardware description language correspond to specific time delays. These fixed values enable accurate determination and adjustment of delays in analog simulations. He has 1 patent to his name.

Career Highlights

Luis is currently employed at Intel Corporation, where he applies his expertise in logic simulation and testing. His work has been instrumental in enhancing the reliability and performance of electronic designs.

Collaborations

Luis has collaborated with notable colleagues, including Bruce Querbach and Amjad M Khan. Their combined efforts have contributed to the success of various projects within the company.

Conclusion

Luis Briceno Guerrero is a distinguished inventor whose work in AC I/O loopback testing has made a significant impact in the field of electronics. His innovative patent and contributions at Intel Corporation highlight his dedication to advancing technology.