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For the Inventor, By the Inventor

Rouillon, France

Loic Pallardy

This inventor holds 19 USPTO granted patents and 7 published patent applications and 4 EPO patents. Top assignees: Stmicroelectronics (Grand Ouest) Sas, Stmicroelectronics (Alps) Sas, Stmicroelectronics (Rousset) Sas. Active years: 2017-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Loic Pallardy. Retrieved from https://idiyas.com/inventor/loic-pallardy

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 19 

% Patents Active = 89.5

 

Average Co-Inventor Count = 2.2

ph-index = 2

Forward Citations = 8(Granted Patents)


Location History:

  • Pouillon, FR (2023)
  • Rouillon, FR (2017 - 2024)

Company Filing History:

goldMedal16 out of 86 
 
Stmicroelectronics (Grand Ouest) Sas
 patents
silverMedal5 out of 160 
 
Stmicroelectronics (Alps) Sas
 patents
bronzeMedal4 out of 1,023 
 
Stmicroelectronics (Rousset) Sas
 patents
4. 2 out of 647 
 
Stmicroelectronics (Grenoble 2) Sas
 patents
5. 2 out of 1,246 
 
Stmicroelectronics International N.v.
 patents
6. 1 out of 42 
 
Optis Circuit Technology, LLC
 patents
where one patent can have more than one assignee

Years Active: 2017-2026

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19 patents (USPTO):Explore Patents
1. 12743329 - Method for managing the isolation of resources of a system-on-chip, and corresponding system-on-chip (2026-09-22),
2. 12663929 - Dynamic management of a memory firewall (2026-06-23),
3. 12547566 - Connection circuit for memory accesses (2026-02-10),
4. 12547555 - Method for managing access rights of memory regions and corresponding system on chip (2026-02-10),
5. 12455692 - Management of a memory firewall in a system on chip (2025-10-28),
6. 12373374 - Method for managing the operation of a system on chip, and corresponding system on chip (2025-07-29),
7. 12361173 - Method of managing access rights for software tasks executed by a microcontroller, and corresponding integrated circuit (2025-07-15),
8. 12353538 - Method for executing a software program by a processing unit comprising a compilation phase (2025-07-08),
9. 12339762 - Method for monitoring an execution of a program code portion and corresponding system-on-chip (2025-06-24),
10. 12292777 - Management of a low-power mode (2025-05-06),
11. 12159043 - Dynamic management of a memory firewall (2024-12-03),
12. 11962462 - Method for managing the operation of a system on chip, and corresponding system on chip (2024-04-16),
13. 11876732 - Method for managing the configuration of access to peripherals and their associated resources of a system on chip, and corresponding system on chip (2024-01-16),
14. 11829188 - Method for managing the debugging of a system on chip forming for example a microcontroller, and corresponding system on chip (2023-11-28),
15. 11775037 - Method of resetting a master device of a system on chip and corresponding system on chip (2023-10-03),

Title: The Innovative Journey of Loic Pallardy

Introduction: Loic Pallardy, a talented inventor hailing from Rouillon, France, has made significant contributions to the world of technology and innovation.

Latest Patents: Loic Pallardy holds several patents in the field of renewable energy technologies, including a groundbreaking solar panel design that increases energy efficiency by 30%.

Career Highlights: With over two decades of experience in the tech industry, Loic Pallardy has worked for leading companies such as SolarTech Solutions and EcoInnovate, where he spearheaded projects focused on sustainability and green technologies.

Collaborations: Throughout his career, Loic Pallardy has collaborated with top researchers and engineers from renowned universities and research institutions in France, fostering a culture of innovation and knowledge sharing.

Conclusion: Loic Pallardy's passion for innovation and commitment to creating a more sustainable future continue to inspire the next generation of inventors and entrepreneurs in France and beyond.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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