Lionel D'Luna

This inventor holds 8 USPTO granted patents. Top assignees: Broadcom Corporation, Avago Technologies General IP (Singapore) Pte. Ltd.. Active years: 2005-2017.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Lionel D'Luna. Retrieved from https://idiyas.com/inventor/lionel-d-luna

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 8

% Patents Active = 37.5

Average Co-Inventor Count = 3.5

ph-index = 3

Forward Citations = 27(Granted Patents)

Company Filing History:

Avago Technologies General IP (Singapore) Pte. Ltd.

patents

Years Active: 2005-2017

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8 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 9668011 - Single chip set-top box system (2017-05-30),

2. 7515504 - Phase controlled high speed interfaces (2009-04-07),

3. 7496819 - Custom logic BIST for memory controller (2009-02-24),

4. 7430680 - System and method to align clock signals (2008-09-30),

5. 7333390 - Phase controlled high speed interfaces (2008-02-19),

6. 7246341 - Byte slice based DDR timing closure (2007-07-17),

7. 7191279 - Schmoo runtime reduction and dynamic calibration based on a DLL lock value (2007-03-13),

8. 6975557 - Phase controlled high speed interfaces (2005-12-13),

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]