The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 24, 2009

Filed:

Jun. 18, 2004
Applicants:

Sathish Kumar, Bangalore, IN;

Lakshmanan Ramakrishnan, Bangalore, IN;

Lionel D'luna, Irvine, CA (US);

Inventors:

Sathish Kumar, Bangalore, IN;

Lakshmanan Ramakrishnan, Bangalore, IN;

Lionel D'Luna, Irvine, CA (US);

Assignee:

Broadcom Corporation, Irvine, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G06F 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and system for testing a memory controller are provided herein. A test sequence may be generated within the memory controller. A test output may also be generated within the memory controller, where the test output is associated with the test sequence. The test output may then be verified. The test sequence may comprise one or more of a control command, a memory address, and/or a DQM signal. The test output may be generated by a sequencer. The test output may be verified by a cyclic redundancy check (CRC) module. The test sequence may also comprise random write data. The random write data may be communicated to a memory controller write data output via a write data bus.


Find Patent Forward Citations

Loading…