Darnestown, MD, United States of America

Li Ming Wang

USPTO Granted Patents = 8 

Average Co-Inventor Count = 3.0

ph-index = 6

Forward Citations = 63(Granted Patents)


Location History:

  • Manassas, VA (US) (1998)
  • Poughkeepsie, NY (US) (2000 - 2001)
  • Darnestown, MD (US) (2005)
  • LaGrangeville, NY (US) (2006 - 2007)

Company Filing History:


Years Active: 1998-2007

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8 patents (USPTO):

Title: Innovations of Li Ming Wang

Introduction

Li Ming Wang is a prominent inventor based in Darnestown, MD (US). She has made significant contributions to the field of technology, holding a total of 8 patents. Her work focuses on enhancing integrated circuit designs and testing methodologies.

Latest Patents

Among her latest patents is a built-in self-test system and method. This innovation utilizes external test equipment to simulate an internal Built-In Self-Test (BIST), allowing for the capture and generation of detailed test results. By simulating the BIST test sequence in real time, the external tester can monitor outputs and determine the exact location of failures. Additionally, she has developed a conductor line stack with a top portion of a second layer that is smaller than the bottom portion. This structure is designed for integrated circuits and includes a layer of a first material, such as heavily doped polysilicon or metal silicide, topped with a second material layer.

Career Highlights

Li Ming Wang has worked with notable companies, including IBM and Infineon Technologies AG. Her experience in these organizations has contributed to her expertise in the field of integrated circuits and testing systems.

Collaborations

Some of her coworkers include Peter Jeffrey Brofman and Patrick Anthony Coico. Their collaboration has likely fostered innovative ideas and advancements in their respective projects.

Conclusion

Li Ming Wang's contributions to technology through her patents and collaborations highlight her role as a leading inventor in the field. Her work continues to influence advancements in integrated circuit design and testing methodologies.

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