Taipei, Taiwan

Lee Tsung Hsiung

This inventor holds 5 USPTO granted patents. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2013-2016.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Lee Tsung Hsiung. Retrieved from https://idiyas.com/inventor/lee-tsung-hsiung

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 40.0

Average Co-Inventor Count = 6.4

ph-index = 4

Forward Citations = 71(Granted Patents)


Company Filing History:


Years Active: 2013-2016

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5 patents (USPTO):Explore Patents

Title: Innovations of Lee Tsung Hsiung

Introduction

Lee Tsung Hsiung is a prominent inventor based in Taipei, Taiwan. He has made significant contributions to the field of technology, particularly in the area of phase-locked loops (PLLs). With a total of 5 patents to his name, his work continues to influence advancements in electronic systems.

Latest Patents

One of Lee's latest patents involves a phase-locked loop (PLL) that includes a clock adjuster. This clock adjuster is designed to receive an initial clock signal with a specific frequency and a mode control signal. It modifies the initial clock signal into a modified clock signal based on the mode control signal. The PLL is engineered to ensure that the loop bandwidth matches a specified bandwidth. Additionally, when the modified clock signal changes, the loop gain of a loop filter is adjusted to maintain the loop bandwidth. Another patent focuses on a PLL that features a dithering circuit. This circuit receives a second tuning signal and generates a dither signal to reduce the magnitude of a spur in the PLL. The dither signal is utilized by a digitally controlled oscillator (DCO) to produce the output signal of the PLL.

Career Highlights

Lee Tsung Hsiung is currently employed at Taiwan Semiconductor Manufacturing Company Limited. His work at this leading semiconductor company has allowed him to develop innovative technologies that enhance electronic performance. His expertise in PLLs has positioned him as a key figure in the industry.

Collaborations

Lee has collaborated with several talented individuals, including Feng Wei Kuo and Kuang-Kai Yen. These collaborations have fostered a creative environment that encourages the development of cutting-edge technologies.

Conclusion

Lee Tsung Hsiung's contributions to the field of technology, particularly through his patents on phase-locked loops, demonstrate his innovative spirit and commitment to advancing electronic systems. His work continues to inspire future developments in the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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