The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 05, 2016
Filed:
Jul. 16, 2014
Taiwan Semiconductor Manufacturing Company Limited, Hsin-Chu, TW;
Feng Wei Kuo, Zhudong Township, TW;
Kuang-Kai Yen, Kaohsiung, TW;
Huan-Neng Chen, Taichung, TW;
Lee Tsung Hsiung, New Taipei, TW;
Chewn-Pu Jou, Hsinchu, TW;
Robert Bogdan Staszewski, Delft, NL;
Taiwan Semiconductor Manufacturing Company Limited, Hsin-Chu, TW;
Abstract
A phase-locked loop (PLL) is provided. The PLL comprises a clock adjuster configured to receive an initial clock signal having an initial frequency and a mode control signal. The clock adjuster is configured to modify the initial clock signal into a modified clock signal based on the mode control signal. The PLL is configured such that a loop bandwidth is equal to a specified bandwidth. When the modified clock signal is changed, a loop gain of a loop filter is adjusted such that the loop bandwidth is substantially equal to the specified bandwidth. When the modified clock signal is changed, an oscillator tuning word (OTW) signal is modified into a normalized OTW signal such that the loop bandwidth is substantially equal to the specified bandwidth.