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Auburn, CA, United States of America

Lawrence S Uzelac

USPTO Granted Patents = 6

EPO Patents = 1

Average Co-Inventor Count = 1.2

ph-index = 3

Forward Citations = 29(Granted Patents)

Location History:

Aubura, CA (US) (2005)
Auburn, CA (US) (2003 - 2008)

Company Filing History:

6 out of 54,664

Intel Corporation

Years Active: 2003-2008

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6 patents (USPTO):Sort by Forward Citations

Abstract keywords

1. 7406609 - Method and apparatus for minimizing leakage current in semiconductor logic (2008-07-29),

2. 6957354 - Method and apparatus for reducing sub-threshold off current for a real time clock circuit during battery operation (2005-10-18),

3. 6834355 - Circuit in which the time delay of an input clock signal is dependent only on its logic phase width and a ratio of capacitances (2004-12-21),

4. 6650170 - Temperature compensated output driver (2003-11-18),

5. 6617874 - Power-up logic reference circuit and related method (2003-09-09),

6. 6611918 - Method and apparatus for changing bias levels to reduce CMOS leakage of a real time clock when switching to a battery mode of operation (2003-08-26),

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