HSINCHU, Taiwan

Kuo-cheng Lee

This inventor holds 3 USPTO granted patents and 6 published patent applications. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2025-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kuo-cheng Lee. Retrieved from https://idiyas.com/inventor/kuo-cheng-lee-dik1ya7b

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 3 

% Patents Active = 100.0

Average Co-Inventor Count = 5.1

ph-index = 1


Company Filing History:


Years Active: 2025-2026

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3 patents (USPTO):Explore Patents

Title: Kuo-cheng Lee: Innovator in Semiconductor Technology

Introduction

Kuo-cheng Lee is a notable inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor technology, particularly with his innovative designs that enhance device performance. His work is recognized for its technical depth and practical applications in the semiconductor industry.

Latest Patents

Kuo-cheng Lee holds a patent for a wide channel semiconductor device. This device features a plurality of isolation structures, each spaced from adjacent structures, which enhances its functionality. The gate structure of the device includes angled sidewalls and a surface dimension that is strategically designed to be less than that of the isolation structures, optimizing the device's performance.

Career Highlights

Kuo-cheng Lee is associated with Taiwan Semiconductor Manufacturing Company Limited, a leading firm in the semiconductor industry. His role at the company allows him to apply his innovative ideas in a practical setting, contributing to advancements in semiconductor technology.

Collaborations

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Conclusion

Kuo-cheng Lee's contributions to semiconductor technology through his patent and work at Taiwan Semiconductor Manufacturing Company Limited highlight his role as an influential inventor in the field. His innovative designs continue to shape the future of semiconductor devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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