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For the Inventor, By the Inventor

San Jose, CA, United States of America

Kishore Badari Atreya

USPTO Granted Patents = 10

Average Co-Inventor Count = 3.1

ph-index = 3

Forward Citations = 17(Granted Patents)


Company Filing History:

goldMedal10 out of 448 
 
Cavium, Inc.
 patents

Years Active: 2016-2019

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10 patents (USPTO):Explore Patents
1. 10466976 - Compiler architecture for programmable application specific integrated circuit based network devices (2019-11-05),
2. 10282315 - Software assisted hardware configuration for software defined network system-on-chip (2019-05-07),
3. 9870204 - Algorithm to achieve optimal layout of instruction tables for programmable network devices (2018-01-16),
4. 9864584 - Code generator for programmable network devices (2018-01-09),
5. 9864583 - Algorithm to derive logic expression to select execution blocks for programmable network devices (2018-01-09),
6. 9864582 - Code processor to build orthogonal execution blocks for programmable network devices (2018-01-09),
7. 9836283 - Compiler architecture for programmable application specific integrated circuit based network devices (2017-12-05),
8. 9606781 - Parser engine programming tool for programmable network devices (2017-03-28),
9. 9582251 - Algorithm to achieve optimal layout of decision logic elements for programmable network devices (2017-02-28),
10. 9372772 - Co-verification—of hardware and software, a unified approach in verification (2016-06-21),

Title: Innovations of Kishore Badari Atreya

Introduction

Kishore Badari Atreya is a prominent inventor based in San Jose, CA (US). He has made significant contributions to the field of technology, particularly in the area of programmable application-specific integrated circuits and software-defined networking. With a total of 10 patents to his name, Atreya continues to push the boundaries of innovation.

Latest Patents

Among his latest patents is the "Compiler architecture for programmable application specific integrated circuit based network devices." This invention describes a processing network that includes multiple lookup and decision engines (LDEs) with configuration registers and on-chip routers. These components work together to route data efficiently between the LDEs. Another notable patent is the "Software assisted hardware configuration for software defined network system-on-chip." This invention enables the co-validation of software and hardware for SDN SoC, allowing for comprehensive testing of both components simultaneously.

Career Highlights

Kishore Badari Atreya is currently employed at Cavium, Inc., where he applies his expertise in developing advanced networking solutions. His work has been instrumental in enhancing the performance and functionality of network devices.

Collaborations

Atreya collaborates with talented professionals in his field, including Ajeer Salil Pudiyapura and Ravindran Suresh. These collaborations foster innovation and contribute to the success of their projects.

Conclusion

Kishore Badari Atreya's contributions to technology through his patents and work at Cavium, Inc. highlight his role as a leading inventor in the industry. His innovative solutions continue to shape the future of networking technology.

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