Kanagawa, Japan

Katsutoshi Izumi

This inventor holds 7 USPTO granted patents. Top assignees: Nippon Telegraph and Telephone Corporation, Komatsu Electronic Metals Co., Ltd., Ntt Electronics Technology Corporation. Active years: 1991-1999.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Katsutoshi Izumi. Retrieved from https://idiyas.com/inventor/katsutoshi-izumi-jfyp2mxu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 2.7

ph-index = 6

Forward Citations = 150(Granted Patents)


Location History:

  • Kanagawa, JP (1991 - 1995)
  • Tokyo, JP (1997)
  • Chiyoda-ku, JP (1999)

Company Filing History:


Years Active: 1991-1999

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7 patents (USPTO):Explore Patents

Title: Innovations of Katsutoshi Izumi

Introduction

Katsutoshi Izumi is a notable inventor based in Kanagawa, Japan. He has made significant contributions to the field of semiconductor technology, holding a total of 7 patents. His work focuses on advanced methods for producing silicon-on-insulator (SOI) substrates and semiconductor devices.

Latest Patents

One of his latest patents is titled "SOI substrate and method of producing the same." This invention describes a method for creating an SOI substrate that features a single-crystal silicon layer on a buried oxide layer. The process involves implanting oxygen ions into a single crystal silicon substrate and conducting anneal processing in an inert gas atmosphere at high temperatures. This results in the formation of the buried oxide layer. Following this, oxidation processing is performed in a high-temperature oxygen atmosphere to achieve the desired thickness of the buried oxide layer.

Another significant patent is the "Method of making semiconductor device having SIMOX structure." In this patent, a SIMOX substrate undergoes high-temperature oxidation treatment after a mask-pattern is formed to shield specific electrodes from oxidation. This technique enhances the thickness of the buffed oxide layer, allowing for the production of MOSFETs with controlled characteristics. The innovation addresses issues related to parasitic capacitance and enables the formation of multiple devices with varying breakdown voltages on the same substrate.

Career Highlights

Katsutoshi Izumi has worked with prominent companies in the technology sector, including Nippon Telegraph and Telephone Corporation and Komatsu Electronic Metals Co., Ltd. His experience in these organizations has contributed to his expertise in semiconductor technologies and innovations.

Collaborations

Throughout his career, Izumi has collaborated with notable colleagues such as Yasuhisa Omura and Norihiko Ohwada. These partnerships have likely fostered a creative environment that has led to significant advancements in their respective fields.

Conclusion

Katsutoshi Izumi's contributions to semiconductor technology through his innovative patents and collaborations highlight his importance in the field. His work continues to influence advancements in the production of semiconductor devices and materials.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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