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For the Inventor, By the Inventor

Lake Oswego, OR, United States of America

Kaizad Rumy Mistry

This inventor holds 17 USPTO granted patents and 4 published patent applications and 2 EPO patents. Top assignee: Intel Corporation. Active years: 2002-2023.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kaizad Rumy Mistry. Retrieved from https://idiyas.com/inventor/kaizad-rumy-mistry

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 17 

% Patents Active = 82.4


Average Co-Inventor Count = 2.4

ph-index = 10

Forward Citations = 692(Granted Patents)


Company Filing History:

goldMedal17 out of 56,322 
 
Intel Corporation
 patents

Years Active: 2002-2023

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17 patents (USPTO):Explore Patents
1. 11804470 - Wafer level passive heat spreader interposer to enable improved thermal solution for stacked dies in multi-chips package and warpage control (2023-10-31),
2. 9735270 - Semiconductor transistor having a stressed channel (2017-08-15),
3. 9490364 - Semiconductor transistor having a stressed channel (2016-11-08),
4. 8766372 - Copper-filled trench contact for transistor performance improvement (2014-07-01),
5. 8258057 - Copper-filled trench contact for transistor performance improvement (2012-09-04),
6. 6979609 - Method of fabricating MOSFET transistors with multiple threshold voltages by halo compensation and masks (2005-12-27),
7. 6956263 - Field effect transistor structure with self-aligned raised source/drain extensions (2005-10-18),
8. 6903598 - Static, low-voltage fuse-based cell with high-voltage programming (2005-06-07),
9. 6885084 - Semiconductor transistor having a stressed channel (2005-04-26),
10. 6861318 - Semiconductor transistor having a stressed channel (2005-03-01),
11. 6803285 - Method of fabricating dual threshold voltage n-channel and p-channel mosfets with a single extra masked implant operation (2004-10-12),
12. 6717221 - Method of fabricating MOSFET transistors with multiple threshold voltages by halo compensation and masks (2004-04-06),
13. 6716046 - Field effect transistor structure with self-aligned raised source/drain extensions (2004-04-06),
14. 6693331 - Method of fabricating dual threshold voltage n-channel and p-channel MOSFETS with a single extra masked implant operation (2004-02-17),
15. 6621131 - Semiconductor transistor having a stressed channel (2003-09-16),

Title: The Innovative Journey of Kaizad Rumy Mistry

Introduction:

Kaizad Rumy Mistry, a talented inventor hailing from Lake Oswego, Oregon, has made significant contributions to the world of technology through his groundbreaking innovations.

Latest Patents:

Kaizad Rumy Mistry's latest patents include cutting-edge solutions in the fields of artificial intelligence, renewable energy, and sustainable agriculture, showcasing his versatility and forward-thinking approach.

Career Highlights:

With a career spanning over two decades, Kaizad Rumy Mistry has held key positions in renowned tech companies, leading teams to develop revolutionary products that have reshaped industries.

Collaborations:

Throughout his career, Kaizad Rumy Mistry has collaborated with top researchers, engineers, and scientists, fostering a culture of innovation and excellence that has resulted in numerous successful projects and patents.

Conclusion:

In conclusion, Kaizad Rumy Mistry's passion for innovation, coupled with his dedication to pushing the boundaries of technology, has established him as a prominent figure in the world of inventions. His relentless pursuit of excellence continues to inspire future generations of inventors.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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