Villach, Austria

Jyotshna Bhandari

This inventor holds 4 USPTO granted patents and 2 published patent applications and 1 EPO patent. Top assignee: Infineon Technologies Austria Ag. Active years: 2022-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jyotshna Bhandari. Retrieved from https://idiyas.com/inventor/jyotshna-bhandari

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 4 

% Patents Active = 100.0

 

Average Co-Inventor Count = 5.9

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2022-2025

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4 patents (USPTO):Explore Patents

Title: Innovations of Jyotshna Bhandari

Introduction

Jyotshna Bhandari is a prominent inventor based in Villach, Austria. She has made significant contributions to the field of semiconductor technology, holding a total of four patents. Her work focuses on the development of advanced semiconductor power devices and manufacturing methods.

Latest Patents

One of her latest patents is titled "Semiconductor power device and method of manufacturing the same." This application relates to a semiconductor power device that includes a semiconductor body where a transistor device is formed. The transistor device features a gate region and a channel region located laterally beside the gate region. The gate region comprises a gate electrode that controls channel formation in the channel region, along with a gate dielectric situated laterally between the channel region and the gate electrode. The gate electrode consists of a bulk region and a layer made of a doped metallically conductive material.

Another notable patent is "Semiconductor transistor device and method of manufacturing the same." This method involves etching a vertical gate trench into a silicon region and depositing a silicon gate material on an interlayer dielectric formed within the trench. The process includes etching through the silicon gate material to partially uncover the upper side of the interlayer dielectric, ensuring that a silicon gate region of the gate electrode remains in the trench. Finally, a metal material is deposited into the vertical gate trench to cover the exposed interlayer dielectric.

Career Highlights

Jyotshna Bhandari is currently employed at Infineon Technologies Austria AG, where she continues to innovate in semiconductor technology. Her expertise and dedication have positioned her as a key figure in her field.

Collaborations

She collaborates with talented coworkers, including Stanislav Vitanov and Robert Paul Haase, contributing to a dynamic and innovative work environment.

Conclusion

Jyotshna Bhandari's contributions to semiconductor technology through her patents and work at Infineon Technologies Austria AG highlight her role as a leading inventor in the industry. Her innovative spirit continues to drive advancements in semiconductor devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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