Suwon-si, South Korea

Jungseok Ahn

This inventor holds 3 USPTO granted patents and 4 published patent applications. Top assignee: Samsung Electronics Co., Ltd.. Active years: 2023-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jungseok Ahn. Retrieved from https://idiyas.com/inventor/jungseok-ahn

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 3 

% Patents Active = 100.0

Average Co-Inventor Count = 2.4

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2023-2026

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3 patents (USPTO):Explore Patents

Title: Jungseok Ahn and Semiconductor Packaging Innovation.

Introduction

Jungseok Ahn is an inventor associated with Suwon-si, South Korea, and Samsung Electronics Co., Ltd. His recorded patent work concerns semiconductor packaging, a field focused on assembling and connecting chips for use in electronic devices.

Latest Patents

Ahn is listed as an inventor on one patent: “Semiconductor Package Including Stacked Chips and Method of Manufacturing the Semiconductor Package.” The invention addresses a semiconductor package containing stacked chips and a method for manufacturing that package. The available information does not establish when the patent was filed or granted.

Career Highlights

Ahn’s recorded patent contribution reflects work in semiconductor packaging, an area relevant to the integration of multiple chips into compact electronic systems. He is associated with Samsung Electronics Co., Ltd. 1 patent is listed for him in the provided data.

Collaborations

Ahn is listed alongside fellow inventor Seyong Lee on the semiconductor packaging patent. Their shared inventorship connects them to the disclosed package design and manufacturing method.

Conclusion

Jungseok Ahn’s recorded innovation centers on stacked-chip semiconductor packaging, developed in collaboration with Seyong Lee and associated with Samsung Electronics Co., Ltd.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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