Jiangsu, China

Jun Yang

This inventor holds 37 USPTO granted patents and 3 published patent applications and 4 EPO patents, primarily in Circuit Design. Top assignees: Southeast University, Realtek Semiconductor Inc., Google Inc.. Active years: 2013-2026.

USPTO Granted Patents = 37 

% Patents Active = 83.8

 

Average Co-Inventor Count = 2.7

ph-index = 5

Forward Citations = 59(Granted Patents)


Location History:

  • Jiangsu Province, CN (2021)
  • Jiangsu, CN (2013 - 2023)
  • Nanjing, CN (2017 - 2023)
  • Suzhou, CN (2013 - 2024)

Company Filing History:


Years Active: 2013-2026

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Areas of Expertise:
Circuit Design
Voltage Conversion
Neural Networks
Analog-to-Digital Converter
Low-Power Circuits
Signal Processing
Power Management
Robustness Enhancement
Timing Monitoring
Speech Feature Extraction
Electro-Optical Systems
Integrated Navigation
37 patents (USPTO):Explore Patents

Title: **Exploring the Innovations of Jun Yang in Neural Network Circuit Design**

Introduction

Jun Yang, an accomplished inventor based in Jiangsu, China, has made significant contributions to the field of circuit design. With a remarkable portfolio of 32 patents, his work focuses primarily on enhancing the efficiency and performance of neural network circuits through innovative methodologies.

Latest Patents

Among his latest patents is the "Ultra low-power negative margin timing monitoring method for neural network circuit." This invention introduces an ultralow-power technique for monitoring timing in neural network circuits, utilizing adaptive voltage regulation technology based on on-chip timing detection. It belongs to the low-power design technical field of integrated circuits and provides an efficient operating method that can significantly lower voltage and maximize power gain.

Another notable patent by Jun Yang is the "Method for predicting fluctuation of circuit path delay on basis of machine learning." This method outlines a systematic approach for predicting circuit path delay fluctuations, utilizing advanced machine learning techniques. The steps include the selection of suitable sample characteristics, random path generation through parameters, and the establishment of a path delay prediction model, ultimately leading to enhanced timing analysis accuracy and efficiency.

Career Highlights

Jun Yang has had a diverse career, contributing to recognized institutions including Southeast University and Realtek Semiconductor Inc. His work has been instrumental in pushing the boundaries of low-power circuit design, laying a foundation for future innovations in the field.

Collaborations

Throughout his career, Jun Yang has collaborated with talented professionals such as Longxing Shi and Xinning Liu. These partnerships have fostered an environment of innovation and collaboration, allowing for the exchange of ideas and the development of groundbreaking technologies.

Conclusion

In summary, Jun Yang is a pioneering inventor whose significant contributions to neural network circuit design are epitomized by his extensive patent portfolio. His latest methodologies not only showcase his ingenuity but also pave the way for future advancements in integrated circuit technology.

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