Gyeonggi-do, South Korea

Jun-Sik Hong

This inventor holds 3 USPTO granted patents. Top assignee: Samsung Electronics Co., Ltd.. Active years: 2006-2010.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jun-Sik Hong. Retrieved from https://idiyas.com/inventor/jun-sik-hong

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 33.3

Average Co-Inventor Count = 4.5

ph-index = 1

Forward Citations = 7(Granted Patents)


Company Filing History:


Years Active: 2006-2010

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3 patents (USPTO):Explore Patents

Title: Innovations of Jun-Sik Hong in Semiconductor Technology

Introduction

Jun-Sik Hong is a prominent inventor based in Gyeonggi-do, South Korea. He has made significant contributions to the field of semiconductor technology, particularly in the development of DRAM devices and transistors. With a total of 3 patents to his name, his work has been influential in advancing electronic device performance.

Latest Patents

One of Jun-Sik Hong's latest patents is focused on methods for forming DRAM devices that include protective patterns. This patent describes a process where a first interlayer dielectric is formed on a semiconductor substrate, followed by the creation of a contact pad that connects to the substrate. A bitline is then formed on the first interlayer dielectric, ensuring it does not contact the contact pad. The process continues with the formation and planarization of a second interlayer dielectric, which exposes the top of the bitline. A protective layer is applied to the entire surface of the resultant structure, and a sacrificial layer is formed on top of the protective layer. This layer, along with the protective layer and the second interlayer dielectric, is patterned to create a bottom electrode contact hole that exposes the contact pad. Finally, a conductive layer is formed and planarized to create a bottom electrode contact plug that fills the hole.

Another significant patent involves the method of fabricating a recess channel array transistor using a mask layer with high etch selectivity concerning a silicon substrate. This method allows for the etching of the silicon substrate and an isolation insulating layer to form a recess channel trench. After forming a gate insulating layer and a recess gate stack on the trench, a source and drain are created in the silicon substrate adjacent to the recess gate stack. This innovative approach enables better control over the depth of the recess channel trench while maintaining good etching uniformity.

Career Highlights

Jun-Sik Hong is currently employed at Samsung Electronics Co., Ltd., where he continues to push the boundaries of semiconductor technology. His work has been instrumental in enhancing the efficiency and performance of electronic devices.

Collaborations

Throughout his career, Jun-Sik has collaborated with notable colleagues, including Jong-Seo Hong and Tae-hyuk Ahn. These collaborations have contributed to the advancement of innovative technologies in the semiconductor field.

Conclusion

Jun-Sik Hong's contributions to semiconductor technology through

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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