The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 19, 2010
Filed:
Jan. 06, 2006
Jong-seo Hong, Gyeonggi-do, KR;
Jung-woo Seo, Gyeonggi-do, KR;
Jun-sik Hong, Gyeonggi-do, KR;
Jeong-sic Jeon, Gyeonggi-do, KR;
Jong-Seo Hong, Gyeonggi-do, KR;
Jung-Woo Seo, Gyeonggi-do, KR;
Jun-Sik Hong, Gyeonggi-do, KR;
Jeong-Sic Jeon, Gyeonggi-do, KR;
Abstract
A first interlayer dielectric is formed on a semiconductor substrate. A contact pad is formed to contact the substrate through the first interlayer dielectric. A bitline is formed on the first interlayer dielectric not to contact the contact pad. A second interlayer dielectric is formed and planarized to expose the top of the bitline. A protective layer is formed an entire surface of the resultant structure. A sacrificial layer is formed on the protective layer. The sacrificial layer, the protective layer, and the second interlayer dielectric are patterned between two adjacent bitlines to form a bottom electrode contact hole exposing the contact pad. A conductive layer is formed and planarized to form a bottom electrode contact plug filling the bottom electrode contact hole.