Joseph M McCrate

This inventor holds 20 USPTO granted patents and 3 published patent applications, primarily in Memory Technology. Top assignee: Micron Technology Incorporated. Active years: 2020-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Joseph M McCrate. Retrieved from https://idiyas.com/inventor/joseph-m-mccrate

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 20 (Patent Applications = 3)

% Patents Active = 100.0

Average Co-Inventor Count = 3.3

ph-index = 2

Forward Citations = 11(Granted Patents)

Company Filing History:

20 out of 39,253

Micron Technology Incorporated

patents

Years Active: 2020-2026

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Areas of Expertise:

Memory Device Architecture

Data Protection

Error Correction

Reed-Solomon Decoding

Iterative Decoding

Burst Correction

DRAM Failures

Collaborative Decoding

Voltage Pulses

Data Recovery

Heterogenous Interleaved

Memory Applications

20 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12700448 - Memory device architecture using multiple physical cells per bit to improve read margin and to alleviate the need for managing demarcation read voltages (2026-08-04),

2. 12664051 - Data protection and recovery (2026-06-23),

3. 12572420 - Data protection supplemental to data recovery (2026-03-10),

4. 12536065 - Heterogenous interleaved Reed-Solomon (HetIRS) with erasure decoding (2026-01-27),

5. 12499009 - Interleaved Reed-Solomon (IRS) with collaborative decoding (2025-12-16),

6. 12468598 - Decoder for burst correction read Solomon decoding for memory applications (2025-11-11),

7. 12405852 - Decoder for interleaved Reed-Solomon (IRS) with erasure/collaborative (2025-09-02),

8. 12321229 - Burst correction reed solomon decoding for memory applications (2025-06-03),

9. 12316349 - Iterative decoding technique for correcting DRAM device failures (2025-05-27),

10. 12210413 - Data correction scheme with reduced device overhead (2025-01-28),

11. 12170531 - Iterative decoder for correcting dram device failures (2024-12-17),

12. 12072766 - Data protection and recovery (2024-08-27),

13. 12020743 - Memory device architecture using multiple physical cells per bit to improve read margin and to alleviate the need for managing demarcation read voltages (2024-06-25),

14. 11962327 - Iterative decoding technique for correcting DRAM device failures (2024-04-16),

15. 11868211 - Error detection and correction in memory (2024-01-09),

Title: Joseph M McCrate: Innovator in Memory Systems

Introduction

Joseph M McCrate is a prominent inventor based in Boise, Idaho, recognized for his contributions to memory system technologies. With a total of 11 patents to his name, McCrate has made significant advancements in data correction schemes and error correction protocols, showcasing his expertise in addressing challenges in modern computing.

Latest Patents

Among his latest innovations, McCrate developed a patent titled "Data correction scheme with reduced device overhead." This invention describes methods, systems, and devices aimed at enhancing data integrity in memory systems. The patent outlines how a memory system can utilize check codes and a parity device to detect and correct errors during data read operations. This innovative approach enhances the reliability of data storage and retrieval processes.

Another notable patent from McCrate is the "Iterative decoder for correcting DRAM device failures." This invention introduces a sophisticated error correction code (ECC) decoder capable of accurately identifying and correcting errors within the data received from memory systems. The foundational components, including a syndrome generator and an error value generator, work collaboratively to produce corrected data, significantly improving the efficiency of memory devices in handling errors.

Career Highlights

McCrate currently holds a position at Micron Technology Incorporated, a leader in semiconductor technology. His work at Micron emphasizes cutting-edge research and development in memory solutions, allowing him to influence the design and functionality of next-generation memory devices. His patents reflect his commitment to innovation and problem-solving in the field.

Collaborations

Throughout his career, McCrate has had the opportunity to collaborate with talented individuals such as Robert J Gleixner and Josephine Tiu Hamada. These partnerships have fostered an environment of creative synergy, leading to groundbreaking advancements in memory system technologies.

Conclusion

Joseph M McCrate stands out as an influential inventor in the field of memory systems, with a portfolio of patents that continue to shape the landscape of data correction and memory integrity solutions. His efforts at Micron Technology Incorporated, alongside collaborations with esteemed colleagues, underline his significant contributions to technology innovation. As the industry evolves, McCrate's work will undoubtedly play a crucial role in enhancing the reliability and efficiency of memory systems.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

3 patents pending: