IDiyas

For the Inventor, By the Inventor

Seoul, South Korea

Jong-Ho Yang

USPTO Granted Patents = 9 


Average Co-Inventor Count = 4.0

ph-index = 5

Forward Citations = 347(Granted Patents)


Location History:

  • Seoul, KR (2005 - 2010)
  • SengNam, KR (2011)

Company Filing History:

goldMedal9 out of 131,214 
 
Samsung Electronics Co., Ltd.
 patents
silverMedal1 out of 164,108 
 
International Business Machines Corporation
 patents
bronzeMedal1 out of 14,705 
 
Infineon Technologies Ag
 patents
where one patent can have more than one assignee

Years Active: 2005-2011

where 'Filed Patents' based on already Granted Patents

9 patents (USPTO):
1. 8030196 - Transistor formation using capping layer (2011-10-04),
2. 7651729 - Method of fabricating metal silicate layer using atomic layer deposition technique (2010-01-26),
3. 7510969 - Electrode line structure having fine line width and method of forming the same (2009-03-31),
4. 7396777 - Method of fabricating high-k dielectric layer having reduced impurity (2008-07-08),
5. 7180190 - Electrode line structure having fine line width and method of forming the same (2007-02-20),
6. 7084076 - Method for forming silicon dioxide film using siloxane (2006-08-01),
7. 6989231 - Method of forming fine patterns using silicon oxide layer (2006-01-24),
8. 6933245 - Method of forming a thin film with a low hydrogen content on a semiconductor device (2005-08-23),
9. 6858533 - Semiconductor device having an etch stopper formed of a sin layer by low temperature ALD and method of fabricating the same (2005-02-22),
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