John W Hagerman

Title: Innovations of John W Hagerman

Introduction

John W Hagerman is a notable inventor based in Boxford, MA (US). He has made significant contributions to the field of logic synthesis and circuit design verification. With a total of 3 patents, his work has advanced the methodologies used in integrated circuit design.

Latest Patents

Hagerman's latest patents include techniques and systems for concurrent formal verification of logic synthesis. This innovation allows a synthesis tool to write intermediate checkpoint designs that embody the state of an integrated circuit (IC) design under synthesis as optimization progresses. Meanwhile, formal equivalence checking proceeds in parallel with synthesis, ensuring that the intermediate checkpoint designs are equivalent. Another significant patent involves rule-based hierarchy generation in a circuit design verification system. This patent describes a hierarchical structure for a non-hierarchical, non-ordered second representation of a circuit design, generated from a first hierarchical representation and a set of generation rules. This new hierarchical structure enables comparison between the reference hierarchical structure and the new hierarchy representation to determine equivalence of the circuit designs.

Career Highlights

Throughout his career, John W Hagerman has worked with prominent companies such as Chrysalis Symbolic Design, Inc. and Synopsys, Inc. His experience in these organizations has allowed him to refine his skills and contribute to groundbreaking innovations in the field.

Collaborations

Hagerman has collaborated with notable coworkers, including Matthew J Bellantoni and Richard J Cloutier. These partnerships have fostered an environment of innovation and creativity, leading to advancements in circuit design and verification.

Conclusion

John W Hagerman's contributions to the field of logic synthesis and circuit design verification are noteworthy. His patents reflect a commitment to advancing technology and improving methodologies in integrated circuit design.