John Pasternak

Title: Innovations of John Pasternak

Introduction

John Pasternak is a notable inventor based in San Jose, California. He holds three patents that showcase his contributions to the field of electronics and circuit design. His work has significantly impacted the efficiency and functionality of various electronic systems.

Latest Patents

One of his latest patents is the "Single phase clock-gating circuit." This circuit includes three PMOS transistors and three NMOS transistors, designed to optimize power consumption in electronic devices. The configuration allows for effective signal management, enhancing the overall performance of the circuit. Another significant patent is for "Multi-bit standard cells for consolidating transistors with selective sourcing." This method involves designing a standard cell, such as a multi-bit flip-flop, by identifying and correlating sets of transistors to improve circuit consolidation. This innovation aims to reduce the area required for multi-bit standard cells, thereby enhancing efficiency in circuit design.

Career Highlights

Throughout his career, John has worked with prominent companies such as Synopsys, Inc. and Synopsis Incorporated. His experience in these organizations has allowed him to develop and refine his innovative ideas in circuit design and electronics.

Collaborations

John has collaborated with notable coworkers, including James David Sproch and Pradip Subhana Jadhav. These collaborations have contributed to the advancement of his projects and innovations.

Conclusion

John Pasternak's contributions to the field of electronics through his patents and career achievements highlight his role as a significant inventor. His work continues to influence the design and efficiency of electronic circuits.