City, China

Jing Wang

This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignees: Taiwan Semiconductor Manufacturing Comp. Ltd., TSMC China Company Limited. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jing Wang. Retrieved from https://idiyas.com/inventor/jing-wang-msktv10z

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Jing Wang and Semiconductor Fabrication Process Innovation.

Introduction

Jing Wang is an inventor associated with semiconductor fabrication technology. The supplied information lists her location as “City, CN” and credits her with 1 patent.

Latest Patents

Wang’s listed patent, “System and Method for Semiconductor Fabricating Process,” describes a way to monitor and regulate pump operation across semiconductor-processing chambers. The method receives operational data from two pumps that use different digital protocol formats, decodes the data through a box device, checks whether the first pump’s data falls within an acceptable range, and adjusts that pump when needed.

Career Highlights

The provided career information associates Wang with Taiwan Semiconductor Manufacturing Company Limited and TSMC China Company Limited. Her listed patent focuses on coordinating equipment data and maintaining pressure conditions during semiconductor fabrication.

Collaborations

The supplied information names Lei Xu and Yukai Hou as Wang’s coworkers. No further details about their specific roles or contributions are provided.

Conclusion

Jing Wang’s listed invention addresses equipment monitoring and pressure control in semiconductor manufacturing, reflecting the importance of reliable data handling across fabrication systems.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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