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For the Inventor, By the Inventor

Singapore, Singapore

Jie Yu

USPTO Granted Patents = 9

Average Co-Inventor Count = 3.7

ph-index = 8

Forward Citations = 201(Granted Patents)


Company Filing History:

goldMedal9 out of 962 
 
Chartered Semiconductor Manufacturing Ltd (corporation)
 patents

Years Active: 2000-2002

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9 patents (USPTO):
1. 6355581 - Gas-phase additives for an enhancement of lateral etch component during high density plasma film deposition to improve film gap-fill capability (2002-03-12),
2. 6316304 - Method of forming spacers of multiple widths (2001-11-13),
3. 6294480 - Method for forming an L-shaped spacer with a disposable organic top coating (2001-09-25),
4. 6277700 - High selective nitride spacer etch with high ratio of spacer width to deposited nitride thickness (2001-08-21),
5. 6277683 - Method of forming a sidewall spacer and a salicide blocking shape, using only one silicon nitride layer (2001-08-21),
6. 6251764 - Method to form an L-shaped silicon nitride sidewall spacer (2001-06-26),
7. 6228713 - Self-aligned floating gate for memory application using shallow trench isolation (2001-05-08),
8. 6211008 - Method for forming high-density high-capacity capacitor (2001-04-03),
9. 6156598 - Method for forming a lightly doped source and drain structure using an (2000-12-05),

Title: Innovations by Jie Yu: Pioneering Advances in Semiconductor Technology

Introduction

Jie Yu is a prominent inventor based in Singapore, known for his significant contributions to the field of semiconductor technology. With a total of 9 patents to his name, he has made remarkable strides in enhancing film deposition processes and optimizing MOSFET characteristics.

Latest Patents

One of Jie Yu's latest patents focuses on gas-phase additives that enhance lateral etch components during high-density plasma film deposition. This innovation aims to improve film gap-fill capability, utilizing a method that fabricates silicon oxide and silicon glass layers at low temperatures. The process involves maintaining a specific silicon source to gas additive mole ratio, which is crucial for achieving good film integrity and void-free gap-fill within device structures.

Another notable patent describes a method for forming gate sidewall spacers of varying widths. This technique allows for the optimization of MOSFET characteristics by adjusting the dimensions of lightly doped source/drain extensions. The process includes forming a gate structure on a substrate, implanting lightly doped source drain extensions, and utilizing an insulating liner layer to create spacers with different widths. This innovation enhances the performance of semiconductor devices.

Career Highlights

Jie Yu is currently employed at Chartered Semiconductor Manufacturing Ltd, a corporation recognized for its advancements in semiconductor manufacturing. His work has significantly impacted the industry, leading to improved fabrication techniques and device performance.

Collaborations

Throughout his career, Jie Yu has collaborated with notable colleagues, including Yelehanka Ramachandramurthy Pradeep and Henry Gerung. These partnerships have fostered innovation and contributed to the development of cutting-edge technologies in the semiconductor field.

Conclusion

Jie Yu's contributions to semiconductor technology through his patents and collaborations highlight his role as a leading inventor in the industry. His innovative approaches continue to shape the future of semiconductor manufacturing and device performance.

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