Zhongli, Taiwan

Jia-Lin Lo

This inventor holds 2 USPTO granted patents. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2013-2015.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jia-Lin Lo. Retrieved from https://idiyas.com/inventor/jia-lin-lo

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 7.0

ph-index = 1

Forward Citations = 4(Granted Patents)


Company Filing History:


Years Active: 2013-2015

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2 patents (USPTO):Explore Patents

Title: Jia-Lin Lo: Innovator in Semiconductor Reliability

Introduction

Jia-Lin Lo is a prominent inventor based in Zhongli, Taiwan. He has made significant contributions to the field of semiconductor technology, particularly in reliability simulation systems. With a total of 2 patents, his work is instrumental in advancing the understanding and prediction of semiconductor device performance.

Latest Patents

One of Jia-Lin Lo's latest patents is a "Circuit device reliability simulation system." This innovative system provides methods for predicting semiconductor reliability. The process involves receiving a degradation parameter input of a semiconductor device and utilizing a degradation equation to determine various bias-dependent slope values for degradation over a short time period. The system accumulates these slope values and projects them over a long time period to assess the stress effects on the semiconductor device.

Another notable patent is focused on "Constructing mapping between model parameters and electrical parameters." This method determines a mapping between model parameters and electrical parameters of integrated circuits. The mapping is essential for simulation tools, allowing for a more accurate representation of electrical parameters in relation to model parameters.

Career Highlights

Jia-Lin Lo is currently employed at Taiwan Semiconductor Manufacturing Company Limited, a leading firm in the semiconductor industry. His work at this esteemed company has allowed him to contribute to groundbreaking advancements in semiconductor technology.

Collaborations

Throughout his career, Jia-Lin Lo has collaborated with talented individuals such as Ke-Wei Su and Cheng Yuan Hsiao. These collaborations have fostered innovation and have been pivotal in the development of his patents.

Conclusion

Jia-Lin Lo's contributions to semiconductor reliability and mapping techniques have established him as a key figure in the field. His innovative patents reflect his commitment to enhancing semiconductor technology and reliability.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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