Taiwan Semiconductor Manufacturing Comp. Ltd.

Jia-Lin Lo

Min-Chie Jeng

Ke-Wei Su

Cheng Yuan Hsiao

Yi-Shun Huang

Feng-Ling Hsiao

Yi-Chun Chen

Chen-Ming Tsai

The present disclosure provides systems for predicting semiconductor reliability. In an embodiment a method for predicting the semiconductor reliability includes receiving a degradation parameter input of a semiconductor device and using a degradation equation to determine a plurality of bias dependent slope values for degradation over a short time period according to the degradation parameter input. The plurality of slope values include at least two different slope values for degradation over time. The system accumulates the plurality of slope values and projects the accumulated slope values over a long time period to determine a stress effect for the semiconductor device.

Circuit device reliability simulation system

A method includes determining a mapping between model parameters and electrical parameters of integrated circuits. The model parameters are configured to be used by a simulation tool. A set of electrical parameters is provided, and the mapping is used to map the set of electrical parameters to a set of model parameters.

Constructing mapping between model parameters and electrical parameters

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Zhongli, Taiwan

Jia-Lin Lo