Jeffrey Scott Salowe

This inventor holds 27 USPTO granted patents, primarily in Electronic Design Automation. Top assignee: Cadence Design Systems, Inc.. Active years: 2003-2018.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jeffrey Scott Salowe. Retrieved from https://idiyas.com/inventor/jeffrey-scott-salowe

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 27

% Patents Active = 85.2

Average Co-Inventor Count = 1.7

ph-index = 12

Forward Citations = 359(Granted Patents)

Location History:

Cupertino, CA (US) (2003 - 2012)
San Jose, CA (US) (2015)
Los Gatos, CA (US) (2013 - 2018)

Company Filing History:

27 out of 2,619

Cadence Design Systems, Inc.

patents

Years Active: 2003-2018

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Areas of Expertise:

Electronic Design

Interconnects

Routing Techniques

Constraint Driven

Lithography

Signal Integrity

Track Patterns

Circuit Design

Minimum Spanning Tree

Maximum Flow Analysis

Tessellation

Visualizing Pin Access

27 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 10049175 - Methods, systems, and articles of manufacture for interactively implementing physical electronic designs with track patterns (2018-08-14),

2. 9817941 - Methods, systems, and articles of manufacture for implementing high current carrying interconnects in electronic designs (2017-11-14),

3. 9754072 - Methods, systems, and articles of manufacture for implementing electronic designs using constraint driven techniques (2017-09-05),

4. 9384317 - Methods, systems, and articles of manufacture for implementing electronic designs using constraint driven techniques (2016-07-05),

5. 9251299 - Methods, systems, and articles of manufacture for associating track patterns with rules for electronic designs (2016-02-02),

6. 9213793 - Methods, systems, and articles of manufacture for implementing electronic designs using flexible routing tracks (2015-12-15),

7. 9183343 - Methods, systems, and articles of manufacture for implementing high current carrying interconnects in electronic designs (2015-11-10),

8. 9165103 - Methods, systems, and articles of manufacture for tessellating and labeling routing space for routing electronic designs (2015-10-20),

9. 9117052 - Methods, systems, and articles of manufacture for interactively implementing physical electronic designs with track patterns (2015-08-25),

10. 9104830 - Methods, systems, and articles of manufacture for assigning track patterns to regions of an electronic design (2015-08-11),

11. 9075932 - Methods and systems for routing an electronic design using spacetiles (2015-07-07),

12. 9003349 - Methods, systems, and articles of manufacture for implementing a physical electronic design with area-bounded tracks (2015-04-07),

13. 8984465 - Methods, systems, and articles of manufacture for automatically assigning track patterns to regions for physical implementation of an electronic design (2015-03-17),

14. 8935649 - Methods, systems, and articles of manufacture for routing an electronic design using spacetiles (2015-01-13),

15. 8671368 - Method, system, and program product to implement detail routing for double pattern lithography (2014-03-11),

Title: The Innovative Contributions of Jeffrey Scott Salowe

Introduction

Jeffrey Scott Salowe, an accomplished inventor located in Los Gatos, California, holds a remarkable portfolio of 27 patents. His inventive contributions in the realm of electronic design have significantly impacted the industry, showcasing his expertise and dedication to innovation.

Latest Patents

Among his latest patents, one notable invention focuses on "Methods, systems, and articles of manufacture for interactively implementing physical electronic designs with track patterns." This innovative approach allows users to define a region in an electronic design interactively, identify or generate a corresponding track pattern, and assign that track pattern to the designated region for subsequent physical implementation. Moreover, the patent includes aspects that enable interactive representation of various results on a display using distinct representation schemes. Another significant patent from Salowe involves "Methods, systems, and articles of manufacture for implementing high current carrying interconnects in electronic designs." This invention facilitates improved connectivity by identifying specific regions in the electronic design and generating additional routes connecting nodes without disturbing the existing connectivity.

Career Highlights

Jeffrey is currently associated with Cadence Design Systems, Inc., a prominent company in the electronic design automation industry. His work at Cadence showcases a fusion of creativity and technical expertise in developing solutions that advance the efficiency and effectiveness of electronic designs.

Collaborations

Salowe's collaborative efforts with notable coworkers such as Satish Raj and Steven Lee Pucci further enhance his inventive endeavors. Their combined expertise fosters an environment of innovation, leading to significant advancements in the field of electronic design.

Conclusion

Jeffrey Scott Salowe's impressive list of patents and his influential role at Cadence Design Systems highlight his commitment to pushing the boundaries of electronic design. His innovative spirit and collaboration with talented colleagues continue to inspire advancements in technology and pave the way for future inventions.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]