The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 07, 2015

Filed:

Jun. 28, 2013
Applicant:

Cadence Design Systems, Inc., San Jose, CA (US);

Inventor:

Jeffrey Salowe, Los Gatos, CA (US);

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5081 (2013.01); G06F 17/5077 (2013.01); G06F 17/5072 (2013.01);
Abstract

Disclosed are methods, systems, and articles of manufacture for implementing a physical electronic design with area-bounded tracks. One aspect identifies an area in an electronic design and a track pattern associated with the area, identifies active tracks in the track pattern, and creates spacetiles with the active tracks. This aspect uses area-based search probes based on spacetiles to find viable implementation solutions to implement the area in the electronic design. Another aspect identifies a tracked area associated with a track pattern and a trackless area and use spacetile(s) and a via spacetile layer to transition between the tracked area and the trackless area for implementation of the electronic design in the tracked or the trackless area of the electronic design.


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