San Jose, CA, United States of America

Jean-Marie Brunet

This inventor holds 4 USPTO granted patents. Top assignees: Mentor Graphics Corporation, Other. Active years: 2009-2014.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jean-Marie Brunet. Retrieved from https://idiyas.com/inventor/jean-marie-brunet

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 2.0

ph-index = 3

Forward Citations = 12(Granted Patents)


Company Filing History:


Years Active: 2009-2014

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4 patents (USPTO):Explore Patents

Title: Innovations of Jean-Marie Brunet

Introduction

Jean-Marie Brunet is a notable inventor based in San Jose, California. He has made significant contributions to the field of semiconductor fabrication, holding a total of 4 patents. His work focuses on improving the processes involved in transistor design and photolithography.

Latest Patents

One of his latest patents is titled "Gate modeling for semiconductor fabrication process effects." This invention provides a method for determining a contour simplification of an object for simulation purposes. The method involves identifying an object in a layout of a transistor design that is to be created using the photolithographic process. The object is characterized by its width and length in the layout. A contour simulation is performed to generate a contour object, which simulates parametric variation factors that may occur during the photolithographic process. Based on the generated contour object, an adjusted width and adjusted length of the object are determined. These adjustments are essential for creating a parametric model for simulation. For instance, a layout versus schematic (LVS) tool may back-annotate the layout, and a SPICE simulation can then utilize the LVS tool's output to verify the electrical behavior of the transistor using the adjusted dimensions.

Career Highlights

Throughout his career, Jean-Marie Brunet has worked with various companies, including Mentor Graphics Corporation. His expertise in semiconductor technology has made him a valuable asset in the industry.

Collaborations

Jean-Marie has collaborated with several professionals, including his coworker, William S. Graupp. Their joint efforts have contributed to advancements in semiconductor design and fabrication processes.

Conclusion

Jean-Marie Brunet's innovative work in semiconductor fabrication and his contributions to the field through his patents highlight his importance as an inventor. His ongoing efforts continue to shape the future of technology in this area.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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