Jean-Marc Albert Forey

Title: Innovations of Jean-Marc Albert Forey

Introduction

Jean-Marc Albert Forey is a notable inventor based in Grenoble, France. He has made significant contributions to the field of circuit design and verification. With a focus on clock-domain-crossing methodologies, his work has implications for improving the robustness of circuit verification processes.

Latest Patents

Jean-Marc holds 2 patents that showcase his innovative approaches. His latest patents include:

1. **Clock-domain-crossing specific design mutations to model silicon behavior and measure verification robustness** - This patent describes methods and apparatuses related to identifying CDC signal paths in circuit designs. It emphasizes the importance of synchronization circuitry associated with these paths and introduces design mutations that can enhance functional verification processes.

2. **Method for ranking fault-test pairs based on waveform statistics in a mutation-based test program evaluation system** - This invention focuses on ranking fault-test pairs using waveform statistics. It involves analyzing variations in logic states for both reference and faulty outputs, ultimately determining a ranking result based on waveform differences.

Career Highlights

Jean-Marc is currently employed at Synopsys, Inc., a leading company in electronic design automation. His work at Synopsys has allowed him to apply his innovative ideas in practical applications, contributing to advancements in circuit design and verification.

Collaborations

Throughout his career, Jean-Marc has collaborated with talented individuals such as Namit Gupta and Mahantesh D Narwade. These collaborations have fostered a creative environment that encourages the development of cutting-edge technologies.

Conclusion

Jean-Marc Albert Forey is a distinguished inventor whose work in circuit design and verification has led to valuable patents. His contributions continue to influence the field, showcasing the importance of innovation in technology.