Austin, TX, United States of America

Jaydeep Kulkarni

This inventor holds 7 USPTO granted patents and 11 published patent applications. Top assignee: The University of Texas System. Active years: 2022-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jaydeep Kulkarni. Retrieved from https://idiyas.com/inventor/jaydeep-kulkarni

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 7 

% Patents Active = 71.4

Average Co-Inventor Count = 5.5

ph-index = 1

Forward Citations = 2(Granted Patents)


Company Filing History:


Years Active: 2022-2026

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7 patents (USPTO):Explore Patents

Title: **Innovator Spotlight: Jaydeep Kulkarni**

Introduction

Jaydeep Kulkarni, based in Austin, TX, is a notable inventor who has significantly contributed to the field of semiconductor technology. With a total of five patents to his name, Kulkarni's work primarily focuses on innovative methods for the fabrication of integrated circuits.

Latest Patents

Among his latest patents is the innovative method for fabricating a nanoscale-aligned three-dimensional stacked integrated circuit. This technology utilizes pick-and-place strategies to stack source wafers, which have device layers fabricated using conventional two-dimensional semiconductor fabrication technologies. The source wafers can be arranged in various configurations—sequential or parallel—with connection techniques such as Through Silicon Vias (TSVs) or Inter Layer Vias (ILVs) facilitating versatile integration. Additionally, Kulkarni has developed nanofabrication and design techniques for 3D ICs and configurable ASICs, emphasizing ultra-high density heterogeneous integration.

Career Highlights

Currently, Kulkarni is affiliated with the University of Texas System, where he applies his expertise in advancing semiconductor technologies. His innovative approaches aim to expand the capabilities of integrated circuits beyond the limitations of standard photolithography, enabling the construction of semiconductor devices larger than traditional sizes.

Collaborations

Throughout his career, Kulkarni has collaborated with fellow inventors Sidlgata V Sreenivasan and Paras Ajay, contributing to the enriching research environment at the University of Texas System. Their collective efforts have fostered a synergistic innovation culture that pushes the boundaries of current technological capabilities.

Conclusion

Jaydeep Kulkarni is a remarkable inventor whose contributions to semiconductor technology have initiated exciting advancements in integrated circuits. With his ongoing research and innovation, he is set to continue influencing the field for years to come.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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