IDiyas

For the Inventor, By the Inventor

Gilroy, CA, United States of America

James M Apland

USPTO Granted Patents = 13

Average Co-Inventor Count = 2.2

ph-index = 8

Forward Citations = 176(Granted Patents)


Location History:

  • San Jose, CA (US) (1992 - 1996)
  • Gilroy, CA (US) (1998 - 2003)

Company Filing History:

goldMedal11 out of 108 
 
Quicklogic Corporation
 patents
silverMedal1 out of 3,544 
 
Cypress Semiconductor Corporation
 patents
bronzeMedal1 out of 832,680 
Other
 patents

Years Active: 1992-2003

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13 patents (USPTO):
1. 6552410 - Programmable antifuse interfacing a programmable logic and a dedicated device (2003-04-22),
2. 6542096 - Serializer/deserializer embedded in a programmable device (2003-04-01),
3. 6140837 - Charge pumps of antifuse programming circuitry powered from high voltage (2000-10-31),
4. 6101074 - Power-up circuit for field programmable gate arrays (2000-08-08),
5. 6097651 - Precharge circuitry in RAM circuit (2000-08-01),
6. 6081129 - Field programmable gate array having testable antifuse programming (2000-06-27),
7. 5986469 - Programmable integrated circuit having L-shaped programming power buses (1999-11-16),
8. 5966028 - Programming architecture for a programmable integrated circuit employing (1999-10-12),
9. 5955892 - Programmable integrated circuit having test antifuse circuitry for (1999-09-21),
10. 5898776 - Security antifuse that prevents readout of some but not other (1999-04-27),
11. 5828538 - Power-up circuit for field programmable gate arrays (1998-10-27),
12. 5544070 - Programmed programmable device and method for programming antifuses of a (1996-08-06),
13. 5132936 - MOS memory circuit with fast access time (1992-07-21),
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