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For the Inventor, By the Inventor

Sunnyvale, CA, United States of America

Ilyas Elkin

This inventor holds 21 USPTO granted patents and 5 published patent applications, primarily in Digital Circuit Design. Top assignees: Nvidia Corporation, Oracle America, Inc., Sun Microsystems, Inc.. Active years: 2007-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ilyas Elkin. Retrieved from https://idiyas.com/inventor/ilyas-elkin

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 21 

% Patents Active = 100.0

Average Co-Inventor Count = 2.3

ph-index = 5

Forward Citations = 74(Granted Patents)


Company Filing History:

goldMedal17 out of 6,195 
 
Nvidia Corporation
 patents
silverMedal2 out of 1,928 
 
Oracle America, Inc.
 patents
bronzeMedal2 out of 7,642 
 
Sun Microsystems, Inc.
 patents

Years Active: 2007-2025

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Areas of Expertise:
Data Path Circuit Design
Reinforcement Learning
Power Efficiency
Low Power Flip-Flop
Radix-4 Multiplier
Scan Latch Systems
Voltage Analysis
Coupling Resistance
Clock Gating
Asynchronous Pipelines
On-Die Repeater Circuit
Noise Insensitive Latch
21 patents (USPTO):Explore Patents
1. 12387028 - Data path circuit design using reinforcement learning (2025-08-12),
2. 11294631 - Full adder cell with improved power efficiency (2022-04-05),
3. 11169779 - Full adder cell with improved power efficiency (2021-11-09),
4. 10931266 - Low power flip-flop element with gated clock (2021-02-23),
5. 10466968 - Radix-4 multiplier partial product generation with improved area and power (2019-11-05),
6. 10120028 - Efficient scan latch systems and methods (2018-11-06),
7. 9667230 - Latch and flip-flop circuits with shared clock-enabled supply nodes (2017-05-30),
8. 9496853 - Via resistance analysis systems and methods (2016-11-15),
9. 9448125 - Determining on-chip voltage and temperature (2016-09-20),
10. 9438213 - Low power master-slave flip-flop (2016-09-06),
11. 9435861 - Efficient scan latch systems and methods (2016-09-06),
12. 9425772 - Coupling resistance and capacitance analysis systems and methods (2016-08-23),
13. 9077329 - Latch circuit with a bridging device (2015-07-07),
14. 9071233 - Low power master-slave flip-flop (2015-06-30),
15. 8952705 - System and method for examining asymetric operations (2015-02-10),

Title: The Innovative Journey of Ilyas Elkin: A Visionary Inventor from Sunnyvale, CA

Introduction

Meet Ilyas Elkin, a prolific inventor based in Sunnyvale, CA. With an impressive portfolio of 20 patents, his groundbreaking work has revolutionized the field of electronics and circuit design.

Latest Patents

Among his latest patents is the "Full Adder Cell with Improved Power Efficiency." This cutting-edge adder circuit optimizes power consumption by incorporating advanced XNOR cells, NAND gates, and OAI cells to enhance performance and efficiency. Elkin's ingenuity shines through in his meticulous attention to detail and commitment to pushing the boundaries of innovation.

Career Highlights

Ilyas Elkin has made significant contributions during his tenure at prominent technology companies such as Nvidia Corporation and Sun Microsystems, Inc. His expertise in digital design and semiconductor technology has earned him recognition as a visionary leader in the industry.

Collaborations

Throughout his career, Elkin has collaborated with talented individuals such as Ge Yang and Wojciech Jakub Poppe. Together, they have spearheaded groundbreaking projects and pioneered new technologies that have redefined the way we approach circuit design and electronic systems.

Conclusion

In conclusion, Ilyas Elkin stands as a shining example of innovation and dedication in the world of inventors. His relentless pursuit of excellence and his commitment to pushing the boundaries of what is possible continue to inspire generations of aspiring inventors and engineers. Sunnyvale, CA is truly fortunate to be home to such a visionary mind in the field of electronics and circuit design.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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