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For the Inventor, By the Inventor

Austin, TX, United States of America

Hwa-Joon Oh

This inventor holds 18 USPTO granted patents. Top assignee: International Business Machines Corporation. Active years: 2003-2012.

USPTO Granted Patents = 18

% Patents Active = 16.7

Average Co-Inventor Count = 3.8

ph-index = 6

Forward Citations = 92(Granted Patents)


Company Filing History:

goldMedal18 out of 166,264 
 
International Business Machines Corporation
 patents

Years Active: 2003-2012

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18 patents (USPTO):Explore Patents
1. 8229989 - Method for controlling rounding modes in single instruction multiple data (SIMD) floating-point units (2012-07-24),
2. 8166085 - Reducing the latency of sum-addressed shifters (2012-04-24),
3. 8131795 - High speed adder design for a multiply-add based floating point unit (2012-03-06),
4. 7490119 - High speed adder design for a multiply-add based floating point unit (2009-02-10),
5. 7469265 - Methods and apparatus for performing multi-value range checks (2008-12-23),
6. 7447725 - Apparatus for controlling rounding modes in single instruction multiple data (SIMD) floating-point units (2008-11-04),
7. 7406589 - Processor having efficient function estimate instructions (2008-07-29),
8. 7392270 - Apparatus and method for reducing the latency of sum-addressed shifters (2008-06-24),
9. 7290023 - High performance implementation of exponent adjustment in a floating point design (2007-10-30),
10. 7245159 - Protecting one-hot logic against short-circuits during power-on (2007-07-17),
11. 7237163 - Leakage current reduction system and method (2007-06-26),
12. 7149877 - Byte execution unit for carrying out byte instructions in a processor (2006-12-12),
13. 7137021 - Power saving in FPU with gated power based on opcodes and data (2006-11-14),
14. 7058830 - Power saving in a floating point unit using a multiplier and aligner bypass (2006-06-06),
15. 6914453 - Integrated logic and latch design with clock gating at static input signals (2005-07-05),

Title: Hwa-Joon Oh: Innovator in SIMD Floating-Point Units

Introduction

Hwa-Joon Oh is a prominent inventor based in Austin, TX (US), known for his significant contributions to the field of computing. With a total of 18 patents to his name, he has made remarkable advancements in the technology of floating-point units.

Latest Patents

Hwa-Joon Oh's latest patents include a method for controlling rounding modes in single instruction multiple data (SIMD) floating-point units. This innovative method involves a SIMD floating-point unit that features a floating-point status-and-control register (FPSCR) with distinct rounding mode bit fields. The unit is designed to perform concurrent rounding operations on multiple slices, enhancing efficiency during floating-point operations. Another notable patent focuses on reducing the latency of sum-addressed shifters. This invention allows for the calculation of a shift amount based on multiple numbers, utilizing parallel decoders and adders to decrease processing time significantly.

Career Highlights

Hwa-Joon Oh is currently employed at International Business Machines Corporation (IBM), where he continues to push the boundaries of technology. His work has been instrumental in developing advanced computing solutions that improve performance and efficiency.

Collaborations

Hwa-Joon Oh has collaborated with notable colleagues, including Sang Hoo Dhong and Silvia Melitta Mueller, who contribute to the innovative environment at IBM.

Conclusion

Hwa-Joon Oh's contributions to the field of computing, particularly in SIMD floating-point units, highlight his role as a leading inventor. His patents reflect a commitment to advancing technology and improving computational efficiency.

Profile summary based on public USPTO records.
Please report any incorrect information to [email protected]
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