The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 29, 2008

Filed:

May. 12, 2005
Applicants:

Sang Hoo Dhong, Austin, TX (US);

Gordon Clyde Fossum, Austin, TX (US);

Harm Peter Hofstee, Austin, TX (US);

Brad William Michael, Cedar Park, TX (US);

Silvia Melitta Mueller, Altdorf, DE;

Hwa-joon OH, Austin, TX (US);

Inventors:

Sang Hoo Dhong, Austin, TX (US);

Gordon Clyde Fossum, Austin, TX (US);

Harm Peter Hofstee, Austin, TX (US);

Brad William Michael, Cedar Park, TX (US);

Silvia Melitta Mueller, Altdorf, DE;

Hwa-Joon Oh, Austin, TX (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 7/552 (2006.01); G06F 7/544 (2006.01); G06F 7/38 (2006.01);
U.S. Cl.
CPC ...
Abstract

High-precision floating-point function estimates are split in two instructions each: a low precision table lookup instruction and a linear interpolation instruction. Estimates of different functions can be implemented using this scheme: A separate table-lookup instruction is provided for each different function, while only a single interpolation instruction is needed, since the single interpolation instruction can perform the interpolation step for any of the functions to be estimated. Thus, significantly less overhead is incurred than would be incurred with specialized hardware, while still maintaining a uniform FPU latency, which allows for much simpler control logic.


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