logo

For the Inventor, By the Inventor

Cedar Park, TX, United States of America

Brad William Michael

USPTO Granted Patents = 41 

Average Co-Inventor Count = 5.2

ph-index = 7

Forward Citations = 222(Granted Patents)


Location History:

  • Kingston, NY (US) (1995)
  • Austin, TX (US) (2011 - 2013)
  • Cedar Park, TX (US) (2002 - 2022)

Company Filing History:

goldMedal41 out of 164,197 
 
International Business Machines Corporation
 patents
silverMedal1 out of 1,799 
 
Sony Computer Entertainment Inc.
 patents
bronzeMedal1 out of 52,735 
 
Kabushiki Kaisha Toshiba
 patents
where one patent can have more than one assignee

Years Active: 1995-2024

Loading Chart...
Areas of Expertise:
Memory Error Correction
Dynamic Memory Allocation
Binary Code Arrangement
Multithreaded Programming
Data Transfer Systems
Instruction Cache Management
Error Detection Logic
Power Supply Noise Control
Graphics Subsystem Rendering
Processor Function Estimation
Memory Latency Reduction
Cache Line Eviction
41 patents (USPTO):Explore Patents
1. 12118236 - Dynamically allocating memory controller resources for extended prefetching (2024-10-15),
2. 11372703 - Reduced system memory latency via a variable latency interface (2022-06-28),
3. 11017875 - Tracking address ranges for computer memory errors (2021-05-25),
4. 10971246 - Performing error correction in computer memory (2021-04-06),
5. 10901839 - Common high and low random bit error correction logic (2021-01-26),
6. 10824504 - Common high and low random bit error correction logic (2020-11-03),
7. 10353669 - Managing entries in a mark table of computer memory errors (2019-07-16),
8. 10338999 - Confirming memory marks indicating an error in computer memory (2019-07-02),
9. 10324694 - Arranging binary code based on call graph partitioning (2019-06-18),
10. 10304560 - Performing error correction in computer memory (2019-05-28),
11. 10297335 - Tracking address ranges for computer memory errors (2019-05-21),
12. 10169013 - Arranging binary code based on call graph partitioning (2019-01-01),
13. 10140186 - Memory error recovery (2018-11-27),
14. 9940204 - Memory error recovery (2018-04-10),
15. 9916144 - Arranging binary code based on call graph partitioning (2018-03-13),

I am specialized in innovations, inventions, inventors, patent attorneys, assignees, and patents.

This text is generated by artificial intelligence and may not be accurate.
Please report any incorrect information to support@idiyas.com
Loading…