Hsin-Hsiung Liao

Title: Hsin-Hsiung Liao: Innovator in Timing Model Technologies

Introduction

Hsin-Hsiung Liao is a prominent inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of timing model technologies, holding a total of 5 patents. His work focuses on improving the efficiency and accuracy of timing models in circuit design.

Latest Patents

Liao's latest patents include an innovative method for establishing timing models. This method involves identifying first victim paths in circuit blocks and determining the removal of corresponding aggressor paths based on transmission delays. Additionally, he has developed a timing model building method that utilizes processors to generate interface nets and identified internal nets from gate-level netlists. This approach enhances the accuracy of timing models by ensuring that unconstrained clock trees are appropriately managed.

Career Highlights

Throughout his career, Hsin-Hsiung Liao has worked with notable companies such as Global Unichip Corporation and Taiwan Semiconductor Manufacturing Company. His experience in these leading firms has allowed him to refine his expertise in circuit design and timing analysis.

Collaborations

Liao has collaborated with several talented individuals in his field, including Min-Hsiu Tsai and Meng-Hsiu Tsai. These collaborations have contributed to the advancement of technologies related to timing models.

Conclusion

Hsin-Hsiung Liao's innovative work in timing model technologies has established him as a key figure in the field. His patents and collaborations reflect his commitment to enhancing circuit design efficiency and accuracy.