Mitaka, Japan

Hironori Sakamoto

This inventor holds 15 USPTO granted patents, plus 1 CIPO patent, primarily in FET Circuit Design. Top assignees: Japan Radio Co., Ltd., Nec Corporation, Ntt Mobile Communications Network, Inc.. Active years: 1994-2011.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hironori Sakamoto. Retrieved from https://idiyas.com/inventor/hironori-sakamoto

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 80.0


Average Co-Inventor Count = 2.1

ph-index = 6

Forward Citations = 82(Granted Patents)


Location History:

  • Tokyo, JP (1994 - 2010)
  • Mitaka, JP (1994 - 2011)

Company Filing History:


Years Active: 1994-2011

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Areas of Expertise:
FET Bias Circuit
Diffusion Model
Interference Canceling
Feed-Forward Amplifier
Semiconductor Memory
High-Frequency Divider
Power Amplifier
Control Circuit
Amplifier Testing
Nonlinear Control
Receiver Detection
15 patents (USPTO):Explore Patents

Title: Hironori Sakamoto: Innovator in FET Technology

Introduction

Hironori Sakamoto is a prominent inventor based in Mitaka, Japan. He has made significant contributions to the field of electronics, particularly in the development of FET (Field Effect Transistor) technology. With a total of 15 patents to his name, Sakamoto's work has had a lasting impact on the industry.

Latest Patents

One of Sakamoto's latest innovations is a FET bias circuit. This circuit applies a bias voltage that is not adjusted separately to an amplifying element FET of a FET amplifying circuit. The design includes a monitor element FET that has its gate connected to the gate of the amplifying element FET and a source connected to the source of the amplifying element FET. The drain current of the monitor element FET is substantially proportional to the drain current of the amplifying element FET. Additionally, a fixed bias circuit is incorporated to ensure that the amplifying element FET operates within a predetermined class by applying a bias voltage to the monitor element FET.

Career Highlights

Throughout his career, Sakamoto has worked with notable companies such as Japan Radio Co., Ltd. and NTT Mobile Communications Network, Inc. His experience in these organizations has allowed him to refine his skills and contribute to various innovative projects.

Collaborations

Sakamoto has collaborated with esteemed colleagues, including Toshio Nojima and Akira Ito. These partnerships have fostered a creative environment that has led to the development of groundbreaking technologies.

Conclusion

Hironori Sakamoto's contributions to FET technology and his extensive patent portfolio highlight his role as a key innovator in the electronics field. His work continues to influence the industry and inspire future advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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