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For the Inventor, By the Inventor

Tokyo, Japan

Hidenori Uehara

This inventor holds 8 USPTO granted patents. Top assignee: Oki Electric Industry Co., Ltd.. Active years: 1990-2007.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hidenori Uehara. Retrieved from https://idiyas.com/inventor/hidenori-uehara

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 8

% Patents Active = 100.0

Average Co-Inventor Count = 1.7

ph-index = 4

Forward Citations = 47(Granted Patents)


Company Filing History:

goldMedal8 out of 4,980 
 
Oki Electric Industry Co., Ltd.
 patents

Years Active: 1990-2007

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8 patents (USPTO):Explore Patents
1. 7295055 - Device for eliminating clock signal noise in a semiconductor integrated circuit (2007-11-13),
2. 6304508 - Semiconductor device (2001-10-16),
3. 6262934 - Memory circuit including word line reset circuit and method of resetting word line (2001-07-17),
4. 6091095 - Semiconductor storage (2000-07-18),
5. 6016070 - Pulse extending circuit (2000-01-18),
6. 5177586 - CMOS memory device with improved sense amplifier biasing (1993-01-05),
7. 5087957 - CMOS memory device with improved sense amplifier biasing (1992-02-11),
8. 4951258 - Dynamic random access memory system including predecoder means (1990-08-21),

Title: Hidenori Uehara: Innovator in Semiconductor Technology

Introduction

Hidenori Uehara is a prominent inventor based in Tokyo, Japan. He has made significant contributions to the field of semiconductor technology, holding a total of 8 patents. His work focuses on enhancing the performance and reliability of semiconductor integrated circuits.

Latest Patents

One of Uehara's latest patents is a device for eliminating clock signal noise in a semiconductor integrated circuit. This invention includes an integration circuit with a first and second integrating portion, along with a data input, processing, and output portion. The design features a clock signal that is inverted by an input buffer and applied to a NAND gate with a mask signal. The signal from the NAND gate rises, causing the second integrating portion's signal to fall after a delay, which is crucial for maintaining signal integrity. Another notable patent is for a semiconductor device that includes an internal source voltage generating circuit, or debooster circuit, which stabilizes the boosted voltage necessary for driving internal circuits.

Career Highlights

Uehara is currently employed at Oki Electric Industry Co., Ltd., where he continues to innovate in semiconductor technology. His work has been instrumental in developing solutions that address common challenges in the industry.

Collaborations

Uehara has collaborated with notable colleagues such as Tamihiro Ishimura and Masahumi Miyawaki, contributing to advancements in their field.

Conclusion

Hidenori Uehara's contributions to semiconductor technology through his patents and collaborations highlight his role as a key innovator in the industry. His work continues to influence the development of more efficient and reliable semiconductor devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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