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For the Inventor, By the Inventor

Bengaluru, India

Harsh Chilwal

This inventor holds 3 USPTO granted patents. Top assignee: Synopsys, Inc.. Active years: 2009-2020.

USPTO Granted Patents = 3

% Patents Active = 100.0

Average Co-Inventor Count = 3.6

ph-index = 2

Forward Citations = 8(Granted Patents)


Location History:

  • Bengaluru, IN (2009 - 2012)
  • San Jose, CA (US) (2020)

Company Filing History:

goldMedal3 out of 2,595 
 
Synopsys, Inc.
 patents

Years Active: 2009-2020

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3 patents (USPTO):Explore Patents
1. 10769329 - Retention model with RTL-compatible default operating mode (2020-09-08),
2. 8255859 - Method and system for verification of multi-voltage circuit design (2012-08-28),
3. 7546566 - Method and system for verification of multi-voltage circuit design (2009-06-09),
Profile summary based on public USPTO records.
Please report any incorrect information to [email protected]
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