Portland, OR, United States of America

Harish Ganapathy

This inventor holds 3 USPTO granted patents and 6 published patent applications. Top assignee: Intel Corporation. Active years: 2023-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Harish Ganapathy. Retrieved from https://idiyas.com/inventor/harish-ganapathy-j2yzompj

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 3 

% Patents Active = 33.3

Average Co-Inventor Count = 6.4

ph-index = 1


Company Filing History:


Years Active: 2023-2026

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3 patents (USPTO):Explore Patents

Title: Harish Ganapathy: Innovator in Semiconductor Technology

Introduction

Harish Ganapathy is an accomplished inventor based in Portland, Oregon. With a penchant for semiconductor technologies, he has made significant contributions to the field, exemplified by his patent on innovative isolation gap filling processes for embedded DRAM.

Latest Patents

Harish holds one patent titled "Isolation Gap Filling Process for Embedded DRAM Using Spacer Material." This patent encompasses various embodiments including transistors designed with a semiconductor channel. The innovative process involves a unique arrangement where a source electrode and a drain electrode contact the first surface of the channel, while a gate dielectric separated by a gate electrode enhances transistor functionality. Additionally, the invention introduces an isolation trench adjacent to the semiconductor channel, comprising a spacer lining and isolation fill material, pushing the boundaries of existing semiconductor technology.

Career Highlights

Harish is currently associated with Intel Corporation, a leading multinational technology company. His work at Intel has placed him at the forefront of semiconductor innovation, contributing to advancements that have broad implications for the industry.

Collaborations

Throughout his career, Harish has collaborated with talented individuals such as Chieh-Jen Ku and Bernhard Sell. These partnerships indicate a strong professional network, enhancing the scope and impact of their collective work in technology innovation.

Conclusion

Harish Ganapathy represents a remarkable figure in the field of semiconductor technology. His patent and collaborative efforts illustrate the ongoing evolution of transistors and circuit design, marking him as a prominent inventor within the industry. As technology progresses, Harish's contributions will likely continue to influence future developments in embedded DRAM and beyond.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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