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For the Inventor, By the Inventor

Taoyuan, Taiwan

Hao-Jan Chao

USPTO Granted Patents = 10

Average Co-Inventor Count = 6.3

ph-index = 5

Forward Citations = 161(Granted Patents)


Company Filing History:

goldMedal10 out of 55 
 
Syntest Technologies, Inc.
 patents

Years Active: 2006-2015

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10 patents (USPTO):Explore Patents
1. 9057763 - Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test (2015-06-16),
2. 9026875 - Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test (2015-05-05),
3. 8769359 - Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test (2014-07-01),
4. 8458544 - Multiple-capture DFT system to reduce peak capture power during self-test or scan test (2013-06-04),
5. 8091002 - Multiple-capture DFT system to reduce peak capture power during self-test or scan test (2012-01-03),
6. 7779323 - Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test (2010-08-17),
7. 7284175 - Method and apparatus for diagnosing failures in an integrated circuit using design-for-debug (DFD) techniques (2007-10-16),
8. 7191373 - Method and apparatus for diagnosing failures in an integrated circuit using design-for-debug (DFD) techniques (2007-03-13),
9. 7058869 - Method and apparatus for debug, diagnosis, and yield improvement of scan-based integrated circuits (2006-06-06),
10. 7007213 - Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test (2006-02-28),

Title: The Innovative Mind of Hao-Jan Chao

Introduction: Hao-Jan Chao, an inventor based in Taoyuan, Taiwan, has made significant contributions to the field of integrated circuit technology. With a remarkable portfolio of 10 patents, Chao is well-regarded for his innovative approaches and problem-solving techniques in the realm of fault detection and circuit assembly.

Latest Patents: Among his notable inventions is the "Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test." This patent presents a method to provide ordered capture clocks that enable the detection and location of faults within N clock domains during both self-test and scan-test modes. The process involves generating test stimuli, applying an organized sequence of capture clocks, and analyzing the output responses from scan cells to locate any faults precisely.

Career Highlights: Chao’s career is marked by his dedication to advancing integrated circuit technologies while working with Syntest Technologies, Inc. His expertise in fault detection systems not only enhances the reliability of electronic devices but also contributes significantly to the efficiency of testing methodologies in modern circuits.

Collaborations: Throughout his career, Hao-Jan Chao has collaborated with esteemed colleagues such as Po-Ching Hsu and Laung-Terng Wang. These collaborations have facilitated the exchange of ideas and have been vital in pushing the boundaries of innovation within their projects.

Conclusion: Hao-Jan Chao stands out as an influential inventor in the technology sector. His passion for innovation, combined with his technical prowess, continues to drive advancements in integrated circuit design and testing. As he progresses in his career, his contributions are sure to impact the landscape of technology significantly.

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