Suwon-si, South Korea

Gyosoo Choo

This inventor holds 5 USPTO granted patents and 5 published patent applications and 3 EPO patents. Top assignee: Samsung Electronics Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Gyosoo Choo. Retrieved from https://idiyas.com/inventor/gyosoo-choo-ru0xb22y

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 5 

% Patents Active = 60.0


Average Co-Inventor Count = 3.2

ph-index = 1


Company Filing History:


Years Active: 2026

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5 patents (USPTO):Explore Patents

Title: Innovations of Gyosoo Choo

Introduction

Gyosoo Choo is a notable inventor based in Suwon-si, South Korea. He has made significant contributions to the field of flash memory technology. With a total of 5 patents to his name, Choo's work has had a considerable impact on the industry.

Latest Patents

Choo's latest patents include a block selection circuit controlling series-connected pass transistors using a shared switch circuit and a flash memory that incorporates this technology. The first patent describes a block selection circuit of a flash memory, which includes a first pass transistor connected to an address decoder and a second pass transistor connected in series with the first. It features a first driver circuit that controls the gate voltage of the first pass transistor based on a first enable signal, and a second driver circuit that controls the gate voltage of the second pass transistor based on a second enable signal. Additionally, it includes a first switch circuit that provides a first or second power voltage to the gate of the first pass transistor based on a first switch signal, and a second switch circuit that shares multiple memory blocks to provide the necessary power voltage.

The second patent elaborates on a flash memory that includes a memory block connected to word lines and an address decoder that selects one or more of these lines. It also features a first pass transistor connected to the address decoder and a second pass transistor connected in series with the first. The first and second driver circuits control the gate voltages of the respective pass transistors based on enable signals. During an erase operation, the first driver circuit ensures that the first pass transistor is in a floating state while controlling the power voltage to the second pass transistor.

Career Highlights

Gyosoo Choo is currently employed at Samsung Electronics Ltd., a leading company in the technology sector. His work at Samsung has allowed him to focus on innovative solutions in memory technology, contributing to the advancement of flash memory systems.

Collaborations

Choo has collaborated with notable colleagues such as Tae-Hong Kwon and Sunghun Kim. Their teamwork has fostered an environment of innovation and creativity within their projects.

Conclusion

Gyosoo Choo's contributions to flash memory technology through his patents and work at Samsung Electronics Ltd. highlight his role as a significant inventor in the field. His innovative solutions continue to shape the future of memory technology

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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